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[46.253.189.43]) by smtp.gmail.com with ESMTPSA id c20-20020a05600c0ad400b0040588d85b3asm7098432wmr.15.2023.11.10.23.55.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 10 Nov 2023 23:55:02 -0800 (PST) Message-ID: <8a0a95a1-eb20-4906-9b15-c20d568b7baa@linaro.org> Date: Sat, 11 Nov 2023 08:55:00 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] dt-bindings: watchdog: mediatek,mtk-wdt: add MT7988 watchdog and toprgu To: Daniel Golle Cc: devicetree@vger.kernel.org, AngeloGioacchino Del Regno , Matthias Brugger , Wim Van Sebroeck , Krzysztof Kozlowski , Rob Herring , linux-watchdog@vger.kernel.org, Guenter Roeck , Philipp Zabel , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, Conor Dooley References: <6912f6f406bc45674020681184f3eeca2f2cb63f.1699576174.git.daniel@makrotopia.org> <59629ec1-cc0c-4c5a-87cc-ea30d64ec191@linaro.org> <49cd75fd-962f-417c-9196-3c9edd42e4d5@linaro.org> Content-Language: en-US From: Krzysztof Kozlowski Autocrypt: addr=krzysztof.kozlowski@linaro.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 10/11/2023 21:45, Daniel Golle wrote: > On Fri, Nov 10, 2023 at 09:00:26PM +0100, Krzysztof Kozlowski wrote: >> On 10/11/2023 16:20, Krzysztof Kozlowski wrote: >>> On 10/11/2023 09:09, Krzysztof Kozlowski wrote: >>>> On 10/11/2023 01:30, Daniel Golle wrote: >>>>> Add binding description for mediatek,mt7988-wdt. >>>>> >>>>> Signed-off-by: Daniel Golle >>>>> --- >>>> >>>> ... >>>> >>>>> diff --git a/include/dt-bindings/reset/mediatek,mt7988-resets.h b/include/dt-bindings/reset/mediatek,mt7988-resets.h >>>>> new file mode 100644 >>>>> index 0000000000000..fa7c937505e08 >>>>> --- /dev/null >>>>> +++ b/include/dt-bindings/reset/mediatek,mt7988-resets.h >>>>> @@ -0,0 +1,12 @@ >>>>> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ >>>>> + >>>>> +/* TOPRGU resets */ >>>>> +#define MT7988_TOPRGU_SGMII0_GRST 1 >>>>> +#define MT7988_TOPRGU_SGMII1_GRST 2 >>>>> +#define MT7988_TOPRGU_XFI0_GRST 12 >>>>> +#define MT7988_TOPRGU_XFI1_GRST 13 >>>>> +#define MT7988_TOPRGU_XFI_PEXTP0_GRST 14 >>>>> +#define MT7988_TOPRGU_XFI_PEXTP1_GRST 15 >>>>> +#define MT7988_TOPRGU_XFI_PLL_GRST 16 >>>> >>>> IDs should start from 0 or 1 and increment by 1. If these are not IDs, >>>> then you do not need them in the bindings. >>>> >>>> Where is the driver change using these IDs? > > It isn't needed as the driver doesn't list the IDs. If that would Then it is no a binding. > be true, it would be sufficient to put them into a header next to the > driver or defined inside the driver C file. Not related. Binding header is used by both driver and DTS. > > The defined IDs here are intended to be used in device tree files. Then not a binding. > >>> >>> You nicely skipped my email and keep pushing the idea of putting this >>> into separate patch. >>> >>> No. Respond to received comments. >>> >>>> >>>>> + >>>>> +#define MT7988_TOPRGU_SW_RST_NUM 24 >>>> >>>> Why 24? I see 7. > > Because the wdt on MT7988 has a total of 24 resets. Most of them are > (currently, as there are no GPL drops, no publicly available devices, > ...) undocumented and are not used in Linux **at this point**. Having > to change the driver every time a new reset is discovered or needed to There is no need to change the driver. Once it is set in the binding, to let's say 7, it must stay like this. Since this is not representing real binding resets (there are 7, not 24) and it is no used in DTS: this is not a binding. > be used is tideous, so I thought the best would be -- as we know the > total number of resets -- to already define that, as it's safe to do > and won't need to change. > >>>> Why having it in the bindings in the first place. > > This line can indeed go into the driver, it's not used anywhere else. > I was merely immitating the style of all the existing binding headers > for similar SoCs and didn't want to stick-out style-wise, also in terms > of the added code to the driver which relies on that number being > defined in the header for all other SoCs. > >>>> >>>> It's quite likely I asked the same question about other bindings for >>>> Mediatek. I will be asking every time till this is fixed. >>> >>> No response to this, either. >> >> You still did not respond here. To none of the points here. It's my >> third ping because I want this to be resolved. But ignoring my emails, >> and skipping paragraphs of my replies will not lead anywhere. > > I have answered to this before: > The driver does NOT have any internal list of names of individual > resets, it relies on the reset number from device tree matching the bit > in the controller, just like for any other MediaTek toprgu already > supported by mtk-wdt.c. Sure, and this is not a binding. Please do not make binding things which are not bindings, because later you (you as in plural) come and request to change it, which must not be allowed. But because people stuff not-binding-things into the binding they use it later as arguments that it is allowed to change. As I wrote before, I complained about this already several times and I will be complaining every time. Best regards, Krzysztof