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Thu, 11 Jun 2026 09:22:10 -0700 (PDT) X-Received: by 2002:a17:903:1984:b0:2c1:5135:39f3 with SMTP id d9443c01a7336-2c2f0639a6dmr44759545ad.11.1781194929759; Thu, 11 Jun 2026 09:22:09 -0700 (PDT) Received: from [192.168.1.8] ([122.164.81.0]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2c164fa3a5fsm296310835ad.36.2026.06.11.09.22.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 11 Jun 2026 09:22:09 -0700 (PDT) Message-ID: <8a0e9314-0c97-48c8-be95-986c7e6fe641@oss.qualcomm.com> Date: Thu, 11 Jun 2026 21:52:04 +0530 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/2] Add support for the QMP PCIe PHYs in Qualcomm IPQ9650 To: Vinod Koul Cc: Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260602-ipq9650_pcie_phy-v1-0-d8c32a36dbd9@oss.qualcomm.com> Content-Language: en-US From: Kathiravan Thirumoorthy In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: FRw75y9FAcy3XMdzIVAJjBXL9hOAbN9F X-Proofpoint-Spam-Info: AW1haW4tMjYwNjExMDE2NCBTYWx0ZWRfX+rahznOqMt+/ 3RkcPdanT7EksIoCoSOXgajO3t2OmpDJtl2bIUnWb1v3frBYUEue1Ffu8KnD2QVVL0gaJBouq5q C8eTho1sHID6W0at6aIWShSRR5xmOVk= X-Proofpoint-ORIG-GUID: FRw75y9FAcy3XMdzIVAJjBXL9hOAbN9F X-Authority-Analysis: v=2.4 cv=Kux9H2WN c=1 sm=1 tr=0 ts=6a2ae0b3 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=DVNErGSwdtF8OHn2hLoakQ==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=VwQbUJbxAAAA:8 a=MO7iE5JbH1gLMWvasfoA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjExMDE2NCBTYWx0ZWRfX6q832slbViem FGYlnTsVeqc2PpqtL6hKTxKyOUCQ+S3JIWLpLDk22nBQlVqllMw7vHX8j68Z+cJHgxu1z4mQ/Si gCErABqRYVyibMyjBvnJ7mZEZpXB/du6VJuXrRPjvCw5Fhvd+GzIX/8xdtxE/269xfiCfzzdI2/ oyTcFi/Oicxmp6UdaV8XndZGAbvfs8a52I9lldnAFHjhE5rkm0aPYtbLSnJGa70IcI7ObDtHMnj u1k15rwWp9Cu7KttFm6EDe2wJcnpq+t++Z+CPHfsOVokkbHoklEY8GG/AjXZw+MvWGPKHcVBvx+ 4XFBR08GQYd5wiZ9Zy+EZDpsT+2SvFQ2ne6lJXZdxR28aWxJgnRY/qPWjH+QtQj80dujP8kCsdw u5aAAw41BsPZqJQvXpjazA51/OEzUVOqZxqgpvac/pX1U7AH2fN6RkQQSeazzPKjyKAtRSmWjaV i1egPTcbuPPv+A8EV3A== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-11_03,2026-06-11_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 malwarescore=0 phishscore=0 spamscore=0 bulkscore=0 clxscore=1015 suspectscore=0 lowpriorityscore=0 priorityscore=1501 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606040000 definitions=main-2606110164 On 6/11/2026 4:45 PM, Vinod Koul wrote: > On 02-06-26, 14:40, Kathiravan Thirumoorthy wrote: >> Qualcomm's IPQ9650 SoC has 3 Gen3 dual lane and 2 Gen3 single lane >> controllers with the QMP PHYs. Unlike the PHYs in the other IPQ SoC, >> refgen supply is needed to bringup the PHYs. Both single and dual lane >> shares the same HW init sequence. So reuse the tables. >> >> Document the compatible along with refgen supply and add the phy driver >> support for it. > Please rebase this on phy-next tomorrow. It does not apply for me due to > changes applied ealier today There is a discussion open about the supplies[1]. Once that is clarified, let me re spin. So we can take up this series for v7.3 once that discussion is closed. [1] https://lore.kernel.org/linux-arm-msm/aiqYtowP2DQt7Jw0@vaman/T/#m37a571fac0c77fd00f6379ad9a2414b60431820b >