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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aa6260ea41bsm114574166b.192.2024.12.05.08.58.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 05 Dec 2024 08:58:21 -0800 (PST) Message-ID: <8a8cdb54-93b9-4093-8e85-f3d698d66e22@oss.qualcomm.com> Date: Thu, 5 Dec 2024 17:58:19 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 6/6] arm64: dts: qcom: ipq5332: Enable PCIe phys and controllers To: Varadarajan Narayanan , lpieralisi@kernel.org, kw@linux.com, manivannan.sadhasivam@linaro.org, robh@kernel.org, bhelgaas@google.com, krzk+dt@kernel.org, conor+dt@kernel.org, vkoul@kernel.org, kishon@kernel.org, andersson@kernel.org, konradybcio@kernel.org, p.zabel@pengutronix.de, quic_nsekar@quicinc.com, dmitry.baryshkov@linaro.org, linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org Cc: Praveenkumar I References: <20241204113329.3195627-1-quic_varada@quicinc.com> <20241204113329.3195627-7-quic_varada@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20241204113329.3195627-7-quic_varada@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: rOHn85Gfc2O3mtwNp2euDKOCpZgDNLU0 X-Proofpoint-GUID: rOHn85Gfc2O3mtwNp2euDKOCpZgDNLU0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 bulkscore=0 impostorscore=0 phishscore=0 suspectscore=0 adultscore=0 mlxscore=0 spamscore=0 clxscore=1015 priorityscore=1501 malwarescore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412050124 On 4.12.2024 12:33 PM, Varadarajan Narayanan wrote: > From: Praveenkumar I > > Enable the PCIe controller and PHY nodes for RDP 441. > > Signed-off-by: Praveenkumar I > Signed-off-by: Varadarajan Narayanan > --- > arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts | 74 +++++++++++++++++++++ > 1 file changed, 74 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts b/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts > index 846413817e9a..83eca8435cff 100644 > --- a/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts > +++ b/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts > @@ -62,4 +62,78 @@ data-pins { > bias-pull-up; > }; > }; > + > + pcie0_default: pcie0-default-state { > + clkreq-n-pins { > + pins = "gpio37"; > + function = "pcie0_clk"; > + drive-strength = <8>; > + bias-pull-up; > + }; > + > + perst-n-pins { > + pins = "gpio38"; > + function = "gpio"; > + drive-strength = <8>; > + bias-pull-up; > + output-low; > + }; > + > + wake-n-pins { > + pins = "gpio39"; > + function = "pcie0_wake"; > + drive-strength = <8>; > + bias-pull-up; > + }; > + }; > + > + pcie1_default: pcie1-default-state { > + clkreq-n-pins { > + pins = "gpio46"; > + function = "pcie1_clk"; > + drive-strength = <8>; > + bias-pull-up; > + }; > + > + perst-n-pins { > + pins = "gpio47"; > + function = "gpio"; > + drive-strength = <8>; > + bias-pull-up; > + output-low; > + }; > + > + wake-n-pins { > + pins = "gpio48"; > + function = "pcie1_wake"; > + drive-strength = <8>; > + bias-pull-up; > + }; > + }; > +}; > + > +&pcie0_phy { > + status = "okay"; > +}; 'p' < 't', please put this before &tlmm Also, would this be something to put into rdp-common? Do we still use all of these variants? $ ls arch/arm64/boot/dts/qcom/ipq5332-rdp*.dts arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts arch/arm64/boot/dts/qcom/ipq5332-rdp442.dts arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts arch/arm64/boot/dts/qcom/ipq5332-rdp474.dts Konrad