* [PATCH 0/3] Add EPSS L3 provider support on SA8775P SoC
@ 2024-09-04 17:12 Raviteja Laggyshetty
2024-09-04 17:12 ` [PATCH 1/3] dt-bindings: interconnect: Add EPSS L3 compatible for SA8775P Raviteja Laggyshetty
` (2 more replies)
0 siblings, 3 replies; 13+ messages in thread
From: Raviteja Laggyshetty @ 2024-09-04 17:12 UTC (permalink / raw)
To: Georgi Djakov, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio
Cc: Andy Shevchenko, Sibi Sankar, linux-arm-msm, linux-pm, devicetree,
linux-kernel
Add Epoch Subsystem (EPSS) L3 provider support on SA8775P SoCs.
Raviteja Laggyshetty (3):
dt-bindings: interconnect: Add EPSS L3 compatible for SA8775P
arm64: dts: qcom: sa8775p: add EPSS l3 interconnect provider
interconnect: qcom: Add EPSS L3 support on SA8775P
.../bindings/interconnect/qcom,osm-l3.yaml | 2 ++
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 19 +++++++++++++
drivers/interconnect/qcom/osm-l3.c | 27 +++++++++++++++++++
3 files changed, 48 insertions(+)
--
2.39.2
^ permalink raw reply [flat|nested] 13+ messages in thread* [PATCH 1/3] dt-bindings: interconnect: Add EPSS L3 compatible for SA8775P 2024-09-04 17:12 [PATCH 0/3] Add EPSS L3 provider support on SA8775P SoC Raviteja Laggyshetty @ 2024-09-04 17:12 ` Raviteja Laggyshetty 2024-09-04 18:23 ` Krzysztof Kozlowski 2024-09-04 17:12 ` [PATCH 2/3] arm64: dts: qcom: sa8775p: add EPSS l3 interconnect provider Raviteja Laggyshetty 2024-09-04 17:12 ` [PATCH 3/3] interconnect: qcom: Add EPSS L3 support on SA8775P Raviteja Laggyshetty 2 siblings, 1 reply; 13+ messages in thread From: Raviteja Laggyshetty @ 2024-09-04 17:12 UTC (permalink / raw) To: Georgi Djakov, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: Andy Shevchenko, Sibi Sankar, linux-arm-msm, linux-pm, devicetree, linux-kernel Add Epoch Subsystem (EPSS) L3 interconnect provider binding on SA8775P SoCs. Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com> --- Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml index 21dae0b92819..de2c59ddc94a 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml @@ -33,6 +33,8 @@ properties: - qcom,sm6375-cpucp-l3 - qcom,sm8250-epss-l3 - qcom,sm8350-epss-l3 + - qcom,sa8775p-epss-l3-cl0 + - qcom,sa8775p-epss-l3-cl1 - const: qcom,epss-l3 reg: -- 2.39.2 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 1/3] dt-bindings: interconnect: Add EPSS L3 compatible for SA8775P 2024-09-04 17:12 ` [PATCH 1/3] dt-bindings: interconnect: Add EPSS L3 compatible for SA8775P Raviteja Laggyshetty @ 2024-09-04 18:23 ` Krzysztof Kozlowski 2024-10-25 15:36 ` Raviteja Laggyshetty 0 siblings, 1 reply; 13+ messages in thread From: Krzysztof Kozlowski @ 2024-09-04 18:23 UTC (permalink / raw) To: Raviteja Laggyshetty, Georgi Djakov, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: Andy Shevchenko, Sibi Sankar, linux-arm-msm, linux-pm, devicetree, linux-kernel On 04/09/2024 19:12, Raviteja Laggyshetty wrote: > Add Epoch Subsystem (EPSS) L3 interconnect provider binding on > SA8775P SoCs. > > Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com> > --- > Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml > index 21dae0b92819..de2c59ddc94a 100644 > --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml > +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml > @@ -33,6 +33,8 @@ properties: > - qcom,sm6375-cpucp-l3 > - qcom,sm8250-epss-l3 > - qcom,sm8350-epss-l3 > + - qcom,sa8775p-epss-l3-cl0 > + - qcom,sa8775p-epss-l3-cl1 Your device driver change suggests that cl0 is compatible with other variants. And what about generic fallback here? Can it be used and device will be operating correctly? Best regards, Krzysztof ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 1/3] dt-bindings: interconnect: Add EPSS L3 compatible for SA8775P 2024-09-04 18:23 ` Krzysztof Kozlowski @ 2024-10-25 15:36 ` Raviteja Laggyshetty 0 siblings, 0 replies; 13+ messages in thread From: Raviteja Laggyshetty @ 2024-10-25 15:36 UTC (permalink / raw) To: Krzysztof Kozlowski, Georgi Djakov, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio, Odelu Kukatla Cc: Andy Shevchenko, Sibi Sankar, linux-arm-msm, linux-pm, devicetree, linux-kernel On 9/4/2024 11:53 PM, Krzysztof Kozlowski wrote: > On 04/09/2024 19:12, Raviteja Laggyshetty wrote: >> Add Epoch Subsystem (EPSS) L3 interconnect provider binding on >> SA8775P SoCs. >> >> Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com> >> --- >> Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml | 2 ++ >> 1 file changed, 2 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml >> index 21dae0b92819..de2c59ddc94a 100644 >> --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml >> +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml >> @@ -33,6 +33,8 @@ properties: >> - qcom,sm6375-cpucp-l3 >> - qcom,sm8250-epss-l3 >> - qcom,sm8350-epss-l3 >> + - qcom,sa8775p-epss-l3-cl0 >> + - qcom,sa8775p-epss-l3-cl1 > > Your device driver change suggests that cl0 is compatible with other > variants. > > And what about generic fallback here? Can it be used and device will be > operating correctly? > Falling back to "qcom,epss-l3" won't work because we need to vote into perf state register. I am introducing a new fallback compatible "qcom,epss-l3-perf" for perf voting, which can be used for upcoming qcs8300. epss_l3_cl0: interconnect@18590000 { compatible = "qcom,sa8775p-epss-l3", "qcom,epss-l3-perf"; }; > Best regards, > Krzysztof > ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 2/3] arm64: dts: qcom: sa8775p: add EPSS l3 interconnect provider 2024-09-04 17:12 [PATCH 0/3] Add EPSS L3 provider support on SA8775P SoC Raviteja Laggyshetty 2024-09-04 17:12 ` [PATCH 1/3] dt-bindings: interconnect: Add EPSS L3 compatible for SA8775P Raviteja Laggyshetty @ 2024-09-04 17:12 ` Raviteja Laggyshetty 2024-09-04 17:12 ` [PATCH 3/3] interconnect: qcom: Add EPSS L3 support on SA8775P Raviteja Laggyshetty 2 siblings, 0 replies; 13+ messages in thread From: Raviteja Laggyshetty @ 2024-09-04 17:12 UTC (permalink / raw) To: Georgi Djakov, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: Andy Shevchenko, Sibi Sankar, linux-arm-msm, linux-pm, devicetree, linux-kernel Add Epoch Subsystem (EPSS) L3 interconnect provider node on SA8775P SoCs. Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com> --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index e8dbc8d820a6..06bf2ba556b8 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -8,6 +8,7 @@ #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/clock/qcom,sa8775p-gcc.h> #include <dt-bindings/clock/qcom,sa8775p-gpucc.h> +#include <dt-bindings/interconnect/qcom,osm-l3.h> #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h> #include <dt-bindings/mailbox/qcom-ipcc.h> #include <dt-bindings/firmware/qcom,scm.h> @@ -3777,6 +3778,15 @@ rpmhpd_opp_turbo_l1: opp-9 { }; }; + epss_l3_cl0: interconnect@18590000 { + compatible = "qcom,sa8775p-epss-l3-cl0", + "qcom,epss-l3"; + reg = <0x0 0x18590000 0x0 0x1000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; + clock-names = "xo", "alternate"; + #interconnect-cells = <1>; + }; + cpufreq_hw: cpufreq@18591000 { compatible = "qcom,sa8775p-cpufreq-epss", "qcom,cpufreq-epss"; @@ -3790,6 +3800,15 @@ cpufreq_hw: cpufreq@18591000 { #freq-domain-cells = <1>; }; + epss_l3_cl1: interconnect@18592000 { + compatible = "qcom,sa8775p-epss-l3-cl1", + "qcom,epss-l3"; + reg = <0x0 0x18592000 0x0 0x1000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; + clock-names = "xo", "alternate"; + #interconnect-cells = <1>; + }; + remoteproc_gpdsp0: remoteproc@20c00000 { compatible = "qcom,sa8775p-gpdsp0-pas"; reg = <0x0 0x20c00000 0x0 0x10000>; -- 2.39.2 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 3/3] interconnect: qcom: Add EPSS L3 support on SA8775P 2024-09-04 17:12 [PATCH 0/3] Add EPSS L3 provider support on SA8775P SoC Raviteja Laggyshetty 2024-09-04 17:12 ` [PATCH 1/3] dt-bindings: interconnect: Add EPSS L3 compatible for SA8775P Raviteja Laggyshetty 2024-09-04 17:12 ` [PATCH 2/3] arm64: dts: qcom: sa8775p: add EPSS l3 interconnect provider Raviteja Laggyshetty @ 2024-09-04 17:12 ` Raviteja Laggyshetty 2024-09-04 18:22 ` Krzysztof Kozlowski 2024-09-09 11:44 ` Konrad Dybcio 2 siblings, 2 replies; 13+ messages in thread From: Raviteja Laggyshetty @ 2024-09-04 17:12 UTC (permalink / raw) To: Georgi Djakov, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: Andy Shevchenko, Sibi Sankar, linux-arm-msm, linux-pm, devicetree, linux-kernel Add Epoch Subsystem (EPSS) L3 interconnect provider support on SA8775P SoCs. Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com> --- drivers/interconnect/qcom/osm-l3.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/interconnect/qcom/osm-l3.c b/drivers/interconnect/qcom/osm-l3.c index 61a8695a9adc..e97d61a9d8d7 100644 --- a/drivers/interconnect/qcom/osm-l3.c +++ b/drivers/interconnect/qcom/osm-l3.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. */ #include <linux/args.h> @@ -74,6 +75,11 @@ enum { OSM_L3_SLAVE_NODE, }; +enum { + EPSS_L3_CL1_MASTER_NODE = 20000, + EPSS_L3_CL1_SLAVE_NODE, +}; + #define DEFINE_QNODE(_name, _id, _buswidth, ...) \ static const struct qcom_osm_l3_node _name = { \ .name = #_name, \ @@ -99,6 +105,15 @@ static const struct qcom_osm_l3_node * const epss_l3_nodes[] = { [SLAVE_EPSS_L3_SHARED] = &epss_l3_slave, }; +DEFINE_QNODE(epss_l3_cl1_master, EPSS_L3_CL1_MASTER_NODE, 32, + EPSS_L3_CL1_SLAVE_NODE); +DEFINE_QNODE(epss_l3_cl1_slave, EPSS_L3_CL1_SLAVE_NODE, 32); + +static const struct qcom_osm_l3_node * const epss_l3_cl1_nodes[] = { + [MASTER_EPSS_L3_APPS] = &epss_l3_cl1_master, + [SLAVE_EPSS_L3_SHARED] = &epss_l3_cl1_slave, +}; + static const struct qcom_osm_l3_desc osm_l3 = { .nodes = osm_l3_nodes, .num_nodes = ARRAY_SIZE(osm_l3_nodes), @@ -115,6 +130,14 @@ static const struct qcom_osm_l3_desc epss_l3_perf_state = { .reg_perf_state = EPSS_REG_PERF_STATE, }; +static const struct qcom_osm_l3_desc epss_l3_cl1_perf_state = { + .nodes = epss_l3_cl1_nodes, + .num_nodes = ARRAY_SIZE(epss_l3_cl1_nodes), + .lut_row_size = EPSS_LUT_ROW_SIZE, + .reg_freq_lut = EPSS_REG_FREQ_LUT, + .reg_perf_state = EPSS_REG_PERF_STATE, +}; + static const struct qcom_osm_l3_desc epss_l3_l3_vote = { .nodes = epss_l3_nodes, .num_nodes = ARRAY_SIZE(epss_l3_nodes), @@ -284,6 +307,10 @@ static const struct of_device_id osm_l3_of_match[] = { { .compatible = "qcom,sm8150-osm-l3", .data = &osm_l3 }, { .compatible = "qcom,sc8180x-osm-l3", .data = &osm_l3 }, { .compatible = "qcom,sm8250-epss-l3", .data = &epss_l3_perf_state }, + { .compatible = "qcom,sa8775p-epss-l3-cl0", + .data = &epss_l3_perf_state }, + { .compatible = "qcom,sa8775p-epss-l3-cl1", + .data = &epss_l3_cl1_perf_state }, { } }; MODULE_DEVICE_TABLE(of, osm_l3_of_match); -- 2.39.2 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 3/3] interconnect: qcom: Add EPSS L3 support on SA8775P 2024-09-04 17:12 ` [PATCH 3/3] interconnect: qcom: Add EPSS L3 support on SA8775P Raviteja Laggyshetty @ 2024-09-04 18:22 ` Krzysztof Kozlowski [not found] ` <bfcc65b2-97a4-4353-a2fd-dce927c53428@quicinc.com> 2024-09-09 11:44 ` Konrad Dybcio 1 sibling, 1 reply; 13+ messages in thread From: Krzysztof Kozlowski @ 2024-09-04 18:22 UTC (permalink / raw) To: Raviteja Laggyshetty, Georgi Djakov, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: Andy Shevchenko, Sibi Sankar, linux-arm-msm, linux-pm, devicetree, linux-kernel On 04/09/2024 19:12, Raviteja Laggyshetty wrote: > + > static const struct qcom_osm_l3_desc epss_l3_l3_vote = { > .nodes = epss_l3_nodes, > .num_nodes = ARRAY_SIZE(epss_l3_nodes), > @@ -284,6 +307,10 @@ static const struct of_device_id osm_l3_of_match[] = { > { .compatible = "qcom,sm8150-osm-l3", .data = &osm_l3 }, > { .compatible = "qcom,sc8180x-osm-l3", .data = &osm_l3 }, > { .compatible = "qcom,sm8250-epss-l3", .data = &epss_l3_perf_state }, > + { .compatible = "qcom,sa8775p-epss-l3-cl0", > + .data = &epss_l3_perf_state }, Don't grow it but express compatibility. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 13+ messages in thread
[parent not found: <bfcc65b2-97a4-4353-a2fd-dce927c53428@quicinc.com>]
* Re: [PATCH 3/3] interconnect: qcom: Add EPSS L3 support on SA8775P [not found] ` <bfcc65b2-97a4-4353-a2fd-dce927c53428@quicinc.com> @ 2024-09-06 16:30 ` Krzysztof Kozlowski 2024-10-25 15:38 ` Raviteja Laggyshetty 0 siblings, 1 reply; 13+ messages in thread From: Krzysztof Kozlowski @ 2024-09-06 16:30 UTC (permalink / raw) To: Raviteja Laggyshetty, Georgi Djakov, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: Andy Shevchenko, Sibi Sankar, linux-arm-msm, linux-pm, devicetree, linux-kernel, quic_okukatla, quic_mdtipton On 06/09/2024 17:32, Raviteja Laggyshetty wrote: > > On 9/4/2024 11:52 PM, Krzysztof Kozlowski wrote: >> On 04/09/2024 19:12, Raviteja Laggyshetty wrote: >>> + >>> static const struct qcom_osm_l3_desc epss_l3_l3_vote = { >>> .nodes = epss_l3_nodes, >>> .num_nodes = ARRAY_SIZE(epss_l3_nodes), >>> @@ -284,6 +307,10 @@ static const struct of_device_id osm_l3_of_match[] = { >>> { .compatible = "qcom,sm8150-osm-l3", .data = &osm_l3 }, >>> { .compatible = "qcom,sc8180x-osm-l3", .data = &osm_l3 }, >>> { .compatible = "qcom,sm8250-epss-l3", .data = &epss_l3_perf_state }, >>> + { .compatible = "qcom,sa8775p-epss-l3-cl0", >>> + .data = &epss_l3_perf_state }, >> Don't grow it but express compatibility. > ok. Will rename compatible from "qcom,sa8775p-epss-l3-cl0" to "qcom,sa8775p-epss-l3". This won't solve the problem. You still grow the table, right? Best regards, Krzysztof ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 3/3] interconnect: qcom: Add EPSS L3 support on SA8775P 2024-09-06 16:30 ` Krzysztof Kozlowski @ 2024-10-25 15:38 ` Raviteja Laggyshetty 2024-10-26 11:28 ` Krzysztof Kozlowski 0 siblings, 1 reply; 13+ messages in thread From: Raviteja Laggyshetty @ 2024-10-25 15:38 UTC (permalink / raw) To: Krzysztof Kozlowski, Georgi Djakov, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: Andy Shevchenko, Sibi Sankar, linux-arm-msm, linux-pm, devicetree, linux-kernel, quic_okukatla, quic_mdtipton On 9/6/2024 10:00 PM, Krzysztof Kozlowski wrote: > On 06/09/2024 17:32, Raviteja Laggyshetty wrote: >> >> On 9/4/2024 11:52 PM, Krzysztof Kozlowski wrote: >>> On 04/09/2024 19:12, Raviteja Laggyshetty wrote: >>>> + >>>> static const struct qcom_osm_l3_desc epss_l3_l3_vote = { >>>> .nodes = epss_l3_nodes, >>>> .num_nodes = ARRAY_SIZE(epss_l3_nodes), >>>> @@ -284,6 +307,10 @@ static const struct of_device_id osm_l3_of_match[] = { >>>> { .compatible = "qcom,sm8150-osm-l3", .data = &osm_l3 }, >>>> { .compatible = "qcom,sc8180x-osm-l3", .data = &osm_l3 }, >>>> { .compatible = "qcom,sm8250-epss-l3", .data = &epss_l3_perf_state }, >>>> + { .compatible = "qcom,sa8775p-epss-l3-cl0", >>>> + .data = &epss_l3_perf_state }, >>> Don't grow it but express compatibility. >> ok. Will rename compatible from "qcom,sa8775p-epss-l3-cl0" to "qcom,sa8775p-epss-l3". > > This won't solve the problem. You still grow the table, right? Falling back to "qcom,epss-l3" won't work because we need to vote into perf state register. I am introducing a new fallback compatible "qcom,epss-l3-perf" for perf voting, which can be used for upcoming qcs8300. epss_l3_cl0: interconnect@18590000 { compatible = "qcom,sa8775p-epss-l3", "qcom,epss-l3-perf"; }; > > Best regards, > Krzysztof > ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 3/3] interconnect: qcom: Add EPSS L3 support on SA8775P 2024-10-25 15:38 ` Raviteja Laggyshetty @ 2024-10-26 11:28 ` Krzysztof Kozlowski 2024-10-26 12:24 ` Konrad Dybcio 0 siblings, 1 reply; 13+ messages in thread From: Krzysztof Kozlowski @ 2024-10-26 11:28 UTC (permalink / raw) To: Raviteja Laggyshetty, Georgi Djakov, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: Andy Shevchenko, Sibi Sankar, linux-arm-msm, linux-pm, devicetree, linux-kernel, quic_okukatla, quic_mdtipton On 25/10/2024 17:38, Raviteja Laggyshetty wrote: > > > On 9/6/2024 10:00 PM, Krzysztof Kozlowski wrote: >> On 06/09/2024 17:32, Raviteja Laggyshetty wrote: >>> >>> On 9/4/2024 11:52 PM, Krzysztof Kozlowski wrote: >>>> On 04/09/2024 19:12, Raviteja Laggyshetty wrote: >>>>> + >>>>> static const struct qcom_osm_l3_desc epss_l3_l3_vote = { >>>>> .nodes = epss_l3_nodes, >>>>> .num_nodes = ARRAY_SIZE(epss_l3_nodes), >>>>> @@ -284,6 +307,10 @@ static const struct of_device_id osm_l3_of_match[] = { >>>>> { .compatible = "qcom,sm8150-osm-l3", .data = &osm_l3 }, >>>>> { .compatible = "qcom,sc8180x-osm-l3", .data = &osm_l3 }, >>>>> { .compatible = "qcom,sm8250-epss-l3", .data = &epss_l3_perf_state }, >>>>> + { .compatible = "qcom,sa8775p-epss-l3-cl0", >>>>> + .data = &epss_l3_perf_state }, >>>> Don't grow it but express compatibility. >>> ok. Will rename compatible from "qcom,sa8775p-epss-l3-cl0" to "qcom,sa8775p-epss-l3". >> >> This won't solve the problem. You still grow the table, right? > > Falling back to "qcom,epss-l3" won't work because we need to vote into perf state register. > I am introducing a new fallback compatible "qcom,epss-l3-perf" for perf voting, which can be used for upcoming qcs8300. Maybe, no clue, this was 1.5 months ago. I don't have original patches in the inbox anymore. Just choose something sensible following writing bindings guideline. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 3/3] interconnect: qcom: Add EPSS L3 support on SA8775P 2024-10-26 11:28 ` Krzysztof Kozlowski @ 2024-10-26 12:24 ` Konrad Dybcio 2024-10-26 12:26 ` Krzysztof Kozlowski 0 siblings, 1 reply; 13+ messages in thread From: Konrad Dybcio @ 2024-10-26 12:24 UTC (permalink / raw) To: Krzysztof Kozlowski, Raviteja Laggyshetty, Georgi Djakov, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: Andy Shevchenko, Sibi Sankar, linux-arm-msm, linux-pm, devicetree, linux-kernel, quic_okukatla, quic_mdtipton On 26.10.2024 1:28 PM, Krzysztof Kozlowski wrote: > On 25/10/2024 17:38, Raviteja Laggyshetty wrote: >> >> >> On 9/6/2024 10:00 PM, Krzysztof Kozlowski wrote: >>> On 06/09/2024 17:32, Raviteja Laggyshetty wrote: >>>> >>>> On 9/4/2024 11:52 PM, Krzysztof Kozlowski wrote: >>>>> On 04/09/2024 19:12, Raviteja Laggyshetty wrote: >>>>>> + >>>>>> static const struct qcom_osm_l3_desc epss_l3_l3_vote = { >>>>>> .nodes = epss_l3_nodes, >>>>>> .num_nodes = ARRAY_SIZE(epss_l3_nodes), >>>>>> @@ -284,6 +307,10 @@ static const struct of_device_id osm_l3_of_match[] = { >>>>>> { .compatible = "qcom,sm8150-osm-l3", .data = &osm_l3 }, >>>>>> { .compatible = "qcom,sc8180x-osm-l3", .data = &osm_l3 }, >>>>>> { .compatible = "qcom,sm8250-epss-l3", .data = &epss_l3_perf_state }, >>>>>> + { .compatible = "qcom,sa8775p-epss-l3-cl0", >>>>>> + .data = &epss_l3_perf_state }, >>>>> Don't grow it but express compatibility. >>>> ok. Will rename compatible from "qcom,sa8775p-epss-l3-cl0" to "qcom,sa8775p-epss-l3". >>> >>> This won't solve the problem. You still grow the table, right? >> >> Falling back to "qcom,epss-l3" won't work because we need to vote into perf state register. >> I am introducing a new fallback compatible "qcom,epss-l3-perf" for perf voting, which can be used for upcoming qcs8300. > > Maybe, no clue, this was 1.5 months ago. I don't have original patches > in the inbox anymore. > > Just choose something sensible following writing bindings guideline. You can see that qcom,sm8250-epss-l3 uses the same match data, so that sounds like a good fit Konrad ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 3/3] interconnect: qcom: Add EPSS L3 support on SA8775P 2024-10-26 12:24 ` Konrad Dybcio @ 2024-10-26 12:26 ` Krzysztof Kozlowski 0 siblings, 0 replies; 13+ messages in thread From: Krzysztof Kozlowski @ 2024-10-26 12:26 UTC (permalink / raw) To: Konrad Dybcio, Raviteja Laggyshetty, Georgi Djakov, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: Andy Shevchenko, Sibi Sankar, linux-arm-msm, linux-pm, devicetree, linux-kernel, quic_okukatla, quic_mdtipton On 26/10/2024 14:24, Konrad Dybcio wrote: > On 26.10.2024 1:28 PM, Krzysztof Kozlowski wrote: >> On 25/10/2024 17:38, Raviteja Laggyshetty wrote: >>> >>> >>> On 9/6/2024 10:00 PM, Krzysztof Kozlowski wrote: >>>> On 06/09/2024 17:32, Raviteja Laggyshetty wrote: >>>>> >>>>> On 9/4/2024 11:52 PM, Krzysztof Kozlowski wrote: >>>>>> On 04/09/2024 19:12, Raviteja Laggyshetty wrote: >>>>>>> + >>>>>>> static const struct qcom_osm_l3_desc epss_l3_l3_vote = { >>>>>>> .nodes = epss_l3_nodes, >>>>>>> .num_nodes = ARRAY_SIZE(epss_l3_nodes), >>>>>>> @@ -284,6 +307,10 @@ static const struct of_device_id osm_l3_of_match[] = { >>>>>>> { .compatible = "qcom,sm8150-osm-l3", .data = &osm_l3 }, >>>>>>> { .compatible = "qcom,sc8180x-osm-l3", .data = &osm_l3 }, >>>>>>> { .compatible = "qcom,sm8250-epss-l3", .data = &epss_l3_perf_state }, >>>>>>> + { .compatible = "qcom,sa8775p-epss-l3-cl0", >>>>>>> + .data = &epss_l3_perf_state }, >>>>>> Don't grow it but express compatibility. >>>>> ok. Will rename compatible from "qcom,sa8775p-epss-l3-cl0" to "qcom,sa8775p-epss-l3". >>>> >>>> This won't solve the problem. You still grow the table, right? >>> >>> Falling back to "qcom,epss-l3" won't work because we need to vote into perf state register. >>> I am introducing a new fallback compatible "qcom,epss-l3-perf" for perf voting, which can be used for upcoming qcs8300. >> >> Maybe, no clue, this was 1.5 months ago. I don't have original patches >> in the inbox anymore. >> >> Just choose something sensible following writing bindings guideline. > > You can see that qcom,sm8250-epss-l3 uses the same match data, so that > sounds like a good fit Yep, so probably this was obvious to me when I wrote above comment and I just don't get why fallbacking to qcom,sa8775p-epss-l3... Best regards, Krzysztof ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 3/3] interconnect: qcom: Add EPSS L3 support on SA8775P 2024-09-04 17:12 ` [PATCH 3/3] interconnect: qcom: Add EPSS L3 support on SA8775P Raviteja Laggyshetty 2024-09-04 18:22 ` Krzysztof Kozlowski @ 2024-09-09 11:44 ` Konrad Dybcio 1 sibling, 0 replies; 13+ messages in thread From: Konrad Dybcio @ 2024-09-09 11:44 UTC (permalink / raw) To: Raviteja Laggyshetty, Georgi Djakov, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio Cc: Andy Shevchenko, Sibi Sankar, linux-arm-msm, linux-pm, devicetree, linux-kernel On 4.09.2024 7:12 PM, Raviteja Laggyshetty wrote: > Add Epoch Subsystem (EPSS) L3 interconnect provider support on > SA8775P SoCs. > > Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com> > --- > drivers/interconnect/qcom/osm-l3.c | 27 +++++++++++++++++++++++++++ > 1 file changed, 27 insertions(+) > > diff --git a/drivers/interconnect/qcom/osm-l3.c b/drivers/interconnect/qcom/osm-l3.c > index 61a8695a9adc..e97d61a9d8d7 100644 > --- a/drivers/interconnect/qcom/osm-l3.c > +++ b/drivers/interconnect/qcom/osm-l3.c > @@ -1,6 +1,7 @@ > // SPDX-License-Identifier: GPL-2.0 > /* > * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. > + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. > */ > > #include <linux/args.h> > @@ -74,6 +75,11 @@ enum { > OSM_L3_SLAVE_NODE, > }; > > +enum { > + EPSS_L3_CL1_MASTER_NODE = 20000, > + EPSS_L3_CL1_SLAVE_NODE, > +}; > + > #define DEFINE_QNODE(_name, _id, _buswidth, ...) \ > static const struct qcom_osm_l3_node _name = { \ > .name = #_name, \ > @@ -99,6 +105,15 @@ static const struct qcom_osm_l3_node * const epss_l3_nodes[] = { > [SLAVE_EPSS_L3_SHARED] = &epss_l3_slave, > }; > > +DEFINE_QNODE(epss_l3_cl1_master, EPSS_L3_CL1_MASTER_NODE, 32, > + EPSS_L3_CL1_SLAVE_NODE); > +DEFINE_QNODE(epss_l3_cl1_slave, EPSS_L3_CL1_SLAVE_NODE, 32); > + > +static const struct qcom_osm_l3_node * const epss_l3_cl1_nodes[] = { > + [MASTER_EPSS_L3_APPS] = &epss_l3_cl1_master, > + [SLAVE_EPSS_L3_SHARED] = &epss_l3_cl1_slave, > +}; > + > static const struct qcom_osm_l3_desc osm_l3 = { > .nodes = osm_l3_nodes, > .num_nodes = ARRAY_SIZE(osm_l3_nodes), > @@ -115,6 +130,14 @@ static const struct qcom_osm_l3_desc epss_l3_perf_state = { > .reg_perf_state = EPSS_REG_PERF_STATE, > }; > > +static const struct qcom_osm_l3_desc epss_l3_cl1_perf_state = { > + .nodes = epss_l3_cl1_nodes, > + .num_nodes = ARRAY_SIZE(epss_l3_cl1_nodes), > + .lut_row_size = EPSS_LUT_ROW_SIZE, > + .reg_freq_lut = EPSS_REG_FREQ_LUT, > + .reg_perf_state = EPSS_REG_PERF_STATE, > +}; This is a bad workaround for the unfortunate interconnect API choices (conflicting ICC IDs), in no way specific to this platform > + > static const struct qcom_osm_l3_desc epss_l3_l3_vote = { > .nodes = epss_l3_nodes, > .num_nodes = ARRAY_SIZE(epss_l3_nodes), > @@ -284,6 +307,10 @@ static const struct of_device_id osm_l3_of_match[] = { > { .compatible = "qcom,sm8150-osm-l3", .data = &osm_l3 }, > { .compatible = "qcom,sc8180x-osm-l3", .data = &osm_l3 }, > { .compatible = "qcom,sm8250-epss-l3", .data = &epss_l3_perf_state }, > + { .compatible = "qcom,sa8775p-epss-l3-cl0", > + .data = &epss_l3_perf_state }, Reuse qcom,sm8250-epss-l3, like: compatible = "qcom,foobar-epss-l3", "qcom,sm8250-epss-l3"; Konrad ^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2024-10-26 12:26 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
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2024-09-04 17:12 [PATCH 0/3] Add EPSS L3 provider support on SA8775P SoC Raviteja Laggyshetty
2024-09-04 17:12 ` [PATCH 1/3] dt-bindings: interconnect: Add EPSS L3 compatible for SA8775P Raviteja Laggyshetty
2024-09-04 18:23 ` Krzysztof Kozlowski
2024-10-25 15:36 ` Raviteja Laggyshetty
2024-09-04 17:12 ` [PATCH 2/3] arm64: dts: qcom: sa8775p: add EPSS l3 interconnect provider Raviteja Laggyshetty
2024-09-04 17:12 ` [PATCH 3/3] interconnect: qcom: Add EPSS L3 support on SA8775P Raviteja Laggyshetty
2024-09-04 18:22 ` Krzysztof Kozlowski
[not found] ` <bfcc65b2-97a4-4353-a2fd-dce927c53428@quicinc.com>
2024-09-06 16:30 ` Krzysztof Kozlowski
2024-10-25 15:38 ` Raviteja Laggyshetty
2024-10-26 11:28 ` Krzysztof Kozlowski
2024-10-26 12:24 ` Konrad Dybcio
2024-10-26 12:26 ` Krzysztof Kozlowski
2024-09-09 11:44 ` Konrad Dybcio
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