* [PATCH v3 3/8] dt-bindings: clock: Add Qcom SM6125 GPUCC
[not found] <20230130153252.2310882-1-konrad.dybcio@linaro.org>
@ 2023-01-30 15:32 ` Konrad Dybcio
2023-01-30 15:32 ` [PATCH v3 5/8] dt-bindings: clock: Add Qcom SM6375 GPUCC Konrad Dybcio
2023-01-30 15:32 ` [PATCH v3 7/8] dt-bindings: clock: Add Qcom SM6115 GPUCC Konrad Dybcio
2 siblings, 0 replies; 5+ messages in thread
From: Konrad Dybcio @ 2023-01-30 15:32 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: marijn.suijten, Konrad Dybcio, Michael Turquette, Stephen Boyd,
Rob Herring, Krzysztof Kozlowski, linux-clk, devicetree,
linux-kernel
Add device tree bindings for graphics clock controller for Qualcomm
Technology Inc's SM6125 SoCs.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
v2 -> v3:
- Pick up tags
.../bindings/clock/qcom,sm6125-gpucc.yaml | 64 +++++++++++++++++++
include/dt-bindings/clock/qcom,sm6125-gpucc.h | 31 +++++++++
2 files changed, 95 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm6125-gpucc.yaml
create mode 100644 include/dt-bindings/clock/qcom,sm6125-gpucc.h
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6125-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm6125-gpucc.yaml
new file mode 100644
index 000000000000..374a1844a159
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,sm6125-gpucc.yaml
@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,sm6125-gpucc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Graphics Clock & Reset Controller on SM6125
+
+maintainers:
+ - Konrad Dybcio <konrad.dybcio@linaro.org>
+
+description: |
+ Qualcomm graphics clock control module provides clocks and power domains on
+ Qualcomm SoCs.
+
+ See also:: include/dt-bindings/clock/qcom,sm6125-gpucc.h
+
+properties:
+ compatible:
+ enum:
+ - qcom,sm6125-gpucc
+
+ clocks:
+ items:
+ - description: Board XO source
+ - description: GPLL0 main branch source
+
+ '#clock-cells':
+ const: 1
+
+ '#power-domain-cells':
+ const: 1
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - '#clock-cells'
+ - '#power-domain-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,gcc-sm6125.h>
+ #include <dt-bindings/clock/qcom,rpmcc.h>
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ clock-controller@5990000 {
+ compatible = "qcom,sm6125-gpucc";
+ reg = <0x05990000 0x9000>;
+ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
+ <&gcc GCC_GPU_GPLL0_CLK_SRC>;
+ #clock-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+ };
+...
diff --git a/include/dt-bindings/clock/qcom,sm6125-gpucc.h b/include/dt-bindings/clock/qcom,sm6125-gpucc.h
new file mode 100644
index 000000000000..ce5bd920f2c4
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,sm6125-gpucc.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2023, Linaro Limited
+ */
+
+#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM6125_H
+#define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM6125_H
+
+/* Clocks */
+#define GPU_CC_PLL0_OUT_AUX2 0
+#define GPU_CC_PLL1_OUT_AUX2 1
+#define GPU_CC_CRC_AHB_CLK 2
+#define GPU_CC_CX_APB_CLK 3
+#define GPU_CC_CX_GFX3D_CLK 4
+#define GPU_CC_CX_GMU_CLK 5
+#define GPU_CC_CX_SNOC_DVM_CLK 6
+#define GPU_CC_CXO_AON_CLK 7
+#define GPU_CC_CXO_CLK 8
+#define GPU_CC_GMU_CLK_SRC 9
+#define GPU_CC_SLEEP_CLK 10
+#define GPU_CC_GX_GFX3D_CLK 11
+#define GPU_CC_GX_GFX3D_CLK_SRC 12
+#define GPU_CC_AHB_CLK 13
+#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 14
+
+/* GDSCs */
+#define GPU_CX_GDSC 0
+#define GPU_GX_GDSC 1
+
+#endif
--
2.39.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH v3 5/8] dt-bindings: clock: Add Qcom SM6375 GPUCC
[not found] <20230130153252.2310882-1-konrad.dybcio@linaro.org>
2023-01-30 15:32 ` [PATCH v3 3/8] dt-bindings: clock: Add Qcom SM6125 GPUCC Konrad Dybcio
@ 2023-01-30 15:32 ` Konrad Dybcio
2023-01-30 15:32 ` [PATCH v3 7/8] dt-bindings: clock: Add Qcom SM6115 GPUCC Konrad Dybcio
2 siblings, 0 replies; 5+ messages in thread
From: Konrad Dybcio @ 2023-01-30 15:32 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: marijn.suijten, Konrad Dybcio, Michael Turquette, Stephen Boyd,
Rob Herring, Krzysztof Kozlowski, linux-clk, devicetree,
linux-kernel
Add device tree bindings for graphics clock controller for Qualcomm
Technology Inc's SM6375 SoCs.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
v2 -> v3:
- Pick up tags
.../bindings/clock/qcom,sm6375-gpucc.yaml | 60 +++++++++++++++++++
include/dt-bindings/clock/qcom,sm6375-gpucc.h | 36 +++++++++++
2 files changed, 96 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm6375-gpucc.yaml
create mode 100644 include/dt-bindings/clock/qcom,sm6375-gpucc.h
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6375-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm6375-gpucc.yaml
new file mode 100644
index 000000000000..b480ead5bd69
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,sm6375-gpucc.yaml
@@ -0,0 +1,60 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,sm6375-gpucc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Graphics Clock & Reset Controller on SM6375
+
+maintainers:
+ - Konrad Dybcio <konrad.dybcio@linaro.org>
+
+description: |
+ Qualcomm graphics clock control module provides clocks, resets and power
+ domains on Qualcomm SoCs.
+
+ See also:: include/dt-bindings/clock/qcom,sm6375-gpucc.h
+
+properties:
+ compatible:
+ enum:
+ - qcom,sm6375-gpucc
+
+ clocks:
+ items:
+ - description: Board XO source
+ - description: GPLL0 main branch source
+ - description: GPLL0 div branch source
+ - description: SNoC DVM GFX source
+
+required:
+ - compatible
+ - clocks
+
+allOf:
+ - $ref: qcom,gcc.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,sm6375-gcc.h>
+ #include <dt-bindings/clock/qcom,rpmcc.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ clock-controller@5990000 {
+ compatible = "qcom,sm6375-gpucc";
+ reg = <0 0x05990000 0 0x9000>;
+ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
+ <&gcc GCC_GPU_GPLL0_CLK_SRC>,
+ <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>,
+ <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+ };
+...
diff --git a/include/dt-bindings/clock/qcom,sm6375-gpucc.h b/include/dt-bindings/clock/qcom,sm6375-gpucc.h
new file mode 100644
index 000000000000..0887ac03825e
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,sm6375-gpucc.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2021, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2023, Linaro Limited
+ */
+
+#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_BLAIR_H
+#define _DT_BINDINGS_CLK_QCOM_GPU_CC_BLAIR_H
+
+/* GPU CC clocks */
+#define GPU_CC_PLL0 0
+#define GPU_CC_PLL1 1
+#define GPU_CC_AHB_CLK 2
+#define GPU_CC_CX_GFX3D_CLK 3
+#define GPU_CC_CX_GFX3D_SLV_CLK 4
+#define GPU_CC_CX_GMU_CLK 5
+#define GPU_CC_CX_SNOC_DVM_CLK 6
+#define GPU_CC_CXO_AON_CLK 7
+#define GPU_CC_CXO_CLK 8
+#define GPU_CC_GMU_CLK_SRC 9
+#define GPU_CC_GX_CXO_CLK 10
+#define GPU_CC_GX_GFX3D_CLK 11
+#define GPU_CC_GX_GFX3D_CLK_SRC 12
+#define GPU_CC_GX_GMU_CLK 13
+#define GPU_CC_SLEEP_CLK 14
+
+/* GDSCs */
+#define GPU_CX_GDSC 0
+#define GPU_GX_GDSC 1
+
+/* Resets */
+#define GPU_GX_BCR 0
+#define GPU_ACD_BCR 1
+#define GPU_GX_ACD_MISC_BCR 2
+
+#endif
--
2.39.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH v3 7/8] dt-bindings: clock: Add Qcom SM6115 GPUCC
[not found] <20230130153252.2310882-1-konrad.dybcio@linaro.org>
2023-01-30 15:32 ` [PATCH v3 3/8] dt-bindings: clock: Add Qcom SM6125 GPUCC Konrad Dybcio
2023-01-30 15:32 ` [PATCH v3 5/8] dt-bindings: clock: Add Qcom SM6375 GPUCC Konrad Dybcio
@ 2023-01-30 15:32 ` Konrad Dybcio
2023-01-30 18:16 ` Rob Herring
2023-01-31 16:50 ` Krzysztof Kozlowski
2 siblings, 2 replies; 5+ messages in thread
From: Konrad Dybcio @ 2023-01-30 15:32 UTC (permalink / raw)
To: linux-arm-msm, andersson, agross, krzysztof.kozlowski
Cc: marijn.suijten, Konrad Dybcio, Michael Turquette, Stephen Boyd,
Rob Herring, Krzysztof Kozlowski, linux-clk, devicetree,
linux-kernel
Add device tree bindings for graphics clock controller for Qualcomm
Technology Inc's SM6115 SoCs.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
v2 -> v3:
- Mention resets in description:
- Use gcc.yaml
.../bindings/clock/qcom,sm6115-gpucc.yaml | 58 +++++++++++++++++++
include/dt-bindings/clock/qcom,sm6115-gpucc.h | 36 ++++++++++++
2 files changed, 94 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm6115-gpucc.yaml
create mode 100644 include/dt-bindings/clock/qcom,sm6115-gpucc.h
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6115-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm6115-gpucc.yaml
new file mode 100644
index 000000000000..354ace48301d
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,sm6115-gpucc.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,sm6115-gpucc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Graphics Clock & Reset Controller on SM6115
+
+maintainers:
+ - Konrad Dybcio <konrad.dybcio@linaro.org>
+
+description: |
+ Qualcomm graphics clock control module provides clocks, resets and power
+ domains on Qualcomm SoCs.
+
+ See also:: include/dt-bindings/clock/qcom,sm6115-gpucc.h
+
+properties:
+ compatible:
+ enum:
+ - qcom,sm6115-gpucc
+
+ clocks:
+ items:
+ - description: Board XO source
+ - description: GPLL0 main branch source
+ - description: GPLL0 main div source
+
+required:
+ - compatible
+ - clocks
+
+allOf:
+ - $ref: qcom,gcc.yaml#
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,gcc-sm6115.h>
+ #include <dt-bindings/clock/qcom,rpmcc.h>
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ clock-controller@5990000 {
+ compatible = "qcom,sm6115-gpucc";
+ reg = <0x05990000 0x9000>;
+ clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
+ <&gcc GCC_GPU_GPLL0_CLK_SRC>,
+ <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+ };
+...
diff --git a/include/dt-bindings/clock/qcom,sm6115-gpucc.h b/include/dt-bindings/clock/qcom,sm6115-gpucc.h
new file mode 100644
index 000000000000..945f21a7d745
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,sm6115-gpucc.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2023, Linaro Limited
+ */
+
+#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM6115_H
+#define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM6115_H
+
+/* GPU_CC clocks */
+#define GPU_CC_PLL0 0
+#define GPU_CC_PLL0_OUT_AUX2 1
+#define GPU_CC_PLL1 2
+#define GPU_CC_PLL1_OUT_AUX 3
+#define GPU_CC_AHB_CLK 4
+#define GPU_CC_CRC_AHB_CLK 5
+#define GPU_CC_CX_GFX3D_CLK 6
+#define GPU_CC_CX_GMU_CLK 7
+#define GPU_CC_CX_SNOC_DVM_CLK 8
+#define GPU_CC_CXO_AON_CLK 9
+#define GPU_CC_CXO_CLK 10
+#define GPU_CC_GMU_CLK_SRC 11
+#define GPU_CC_GX_CXO_CLK 12
+#define GPU_CC_GX_GFX3D_CLK 13
+#define GPU_CC_GX_GFX3D_CLK_SRC 14
+#define GPU_CC_SLEEP_CLK 15
+#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 16
+
+/* Resets */
+#define GPU_GX_BCR 0
+
+/* GDSCs */
+#define GPU_CX_GDSC 0
+#define GPU_GX_GDSC 1
+
+#endif
--
2.39.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH v3 7/8] dt-bindings: clock: Add Qcom SM6115 GPUCC
2023-01-30 15:32 ` [PATCH v3 7/8] dt-bindings: clock: Add Qcom SM6115 GPUCC Konrad Dybcio
@ 2023-01-30 18:16 ` Rob Herring
2023-01-31 16:50 ` Krzysztof Kozlowski
1 sibling, 0 replies; 5+ messages in thread
From: Rob Herring @ 2023-01-30 18:16 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Michael Turquette, Krzysztof Kozlowski, linux-clk, devicetree,
linux-kernel, agross, krzysztof.kozlowski, marijn.suijten,
linux-arm-msm, Rob Herring, andersson, Stephen Boyd
On Mon, 30 Jan 2023 16:32:51 +0100, Konrad Dybcio wrote:
> Add device tree bindings for graphics clock controller for Qualcomm
> Technology Inc's SM6115 SoCs.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
> v2 -> v3:
>
> - Mention resets in description:
> - Use gcc.yaml
>
> .../bindings/clock/qcom,sm6115-gpucc.yaml | 58 +++++++++++++++++++
> include/dt-bindings/clock/qcom,sm6115-gpucc.h | 36 ++++++++++++
> 2 files changed, 94 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm6115-gpucc.yaml
> create mode 100644 include/dt-bindings/clock/qcom,sm6115-gpucc.h
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,sm6115-gpucc.example.dtb: clock-controller@5990000: '#clock-cells', '#power-domain-cells', '#reset-cells', 'reg' do not match any of the regexes: 'pinctrl-[0-9]+'
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,sm6115-gpucc.yaml
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230130153252.2310882-8-konrad.dybcio@linaro.org
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v3 7/8] dt-bindings: clock: Add Qcom SM6115 GPUCC
2023-01-30 15:32 ` [PATCH v3 7/8] dt-bindings: clock: Add Qcom SM6115 GPUCC Konrad Dybcio
2023-01-30 18:16 ` Rob Herring
@ 2023-01-31 16:50 ` Krzysztof Kozlowski
1 sibling, 0 replies; 5+ messages in thread
From: Krzysztof Kozlowski @ 2023-01-31 16:50 UTC (permalink / raw)
To: Konrad Dybcio, linux-arm-msm, andersson, agross
Cc: marijn.suijten, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, linux-clk, devicetree, linux-kernel
On 30/01/2023 16:32, Konrad Dybcio wrote:
> Add device tree bindings for graphics clock controller for Qualcomm
> Technology Inc's SM6115 SoCs.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
> v2 -> v3:
>
> - Mention resets in description:
> - Use gcc.yaml
>
> .../bindings/clock/qcom,sm6115-gpucc.yaml | 58 +++++++++++++++++++
> include/dt-bindings/clock/qcom,sm6115-gpucc.h | 36 ++++++++++++
> 2 files changed, 94 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm6115-gpucc.yaml
> create mode 100644 include/dt-bindings/clock/qcom,sm6115-gpucc.h
>
> diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6115-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm6115-gpucc.yaml
> new file mode 100644
> index 000000000000..354ace48301d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/qcom,sm6115-gpucc.yaml
> @@ -0,0 +1,58 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/qcom,sm6115-gpucc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Graphics Clock & Reset Controller on SM6115
> +
> +maintainers:
> + - Konrad Dybcio <konrad.dybcio@linaro.org>
> +
> +description: |
> + Qualcomm graphics clock control module provides clocks, resets and power
> + domains on Qualcomm SoCs.
> +
> + See also:: include/dt-bindings/clock/qcom,sm6115-gpucc.h
> +
> +properties:
> + compatible:
> + enum:
> + - qcom,sm6115-gpucc
> +
> + clocks:
> + items:
> + - description: Board XO source
> + - description: GPLL0 main branch source
> + - description: GPLL0 main div source
> +
> +required:
> + - compatible
> + - clocks
> +
> +allOf:
> + - $ref: qcom,gcc.yaml#
> +
> +additionalProperties: false
unevaluatedProperties: false
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 5+ messages in thread