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Subject: Re: [PATCH v2 04/19] clk: mediatek: Add MT8188 peripheral clock
 support
Content-Language: en-US
To:     "Garmin.Chang" <Garmin.Chang@mediatek.com>,
        Matthias Brugger <matthias.bgg@gmail.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>,
        Richard Cochran <richardcochran@gmail.com>
Cc:     Project_Global_Chrome_Upstream_Group@mediatek.com,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org
References: <20221024094254.29218-1-Garmin.Chang@mediatek.com>
 <20221024094254.29218-5-Garmin.Chang@mediatek.com>
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@collabora.com>
In-Reply-To: <20221024094254.29218-5-Garmin.Chang@mediatek.com>
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Il 24/10/22 11:42, Garmin.Chang ha scritto:
> Add MT8188 peripheral clock controller which provides clock
> gate control for ethernet/flashif/pcie/ssusb.
> 
> Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com>

..snip..

> +
> +static const struct of_device_id of_match_clk_mt8188_peri_ao[] = {
> +	{
> +		.compatible = "mediatek,mt8188-pericfg_ao",
> +		.data = &peri_ao_desc,
> +	}, {
> +		/* sentinel */
> +	}
> +};
> +

Here and for all of the other drivers that you're introducing with this series...

please compress this array to one line per entry, like so:

static const struct of_device_id of_match_clk_mt8188_peri_ao[] = {
	{ .compatible = "mediatek,mt8188-pericfg_ao", .data = &peri_ao_desc },
	{ /* sentinel */ }
};

Regards,
Angelo