Re: [PATCH v4 00/11] consolidated i.MX8MP HSIO/MEDIA/HDMI blk-ctrl series

[Lucas Stach <l.stach@pengutronix.de>]

Hi Shawn,

there were some comments about the implementation of the HDMI blk-ctrl,
which I don't know in which way to resolve, yet. In the meantime it
would be very helpful if you could take all but the last patch of this
series into your tree. They are all reviewed and tested and starting to
block further work on some parts of the i.MX8MP bringup.

Regards,
Lucas

Am Mittwoch, dem 06.04.2022 um 17:33 +0200 schrieb Lucas Stach:
> Hi all,
> 
> this series adds a bunch more power domains that integrate with the blk-ctrls
> to the i.MX8MP. It depends on the i.MX8MP GPCv2 support series posted in [1].
> 
> The HSIO blk-ctrl bindings are already applied upstream, so they are not part
> of this series anymore. The DT description hasn't changed, but the
> implementation of the HSIO blk-ctrl driver is reworked quite a bit from the
> last round of patches, so I've dropped the review/tested-by tags.
> 
> I've also picked up the pretty thoroughly reviewed and tested MEDIA blk-ctrl
> patches from Paul and Laurent into this series, as they would conflict with
> other patches from this series when applied separately. This should hopefully
> make it easier for Shawn to pick things up.
> 
> Finally this now also adds the HDMI blk-ctrl, not part of any previous series.
> This one is pretty complex and the documentation in the reference manual
> appears to be inaccurate. I found at least the following issues:
> 
> 1. GLOBAL_XTAL24M_CLK_EN does not actually gate the 24MHz reference clock,
> the PHY PLL happily locks and provides correct clocks without this clock being
> ungated. It seems to gate some clock input of the HDMI TX controller instead,
> register access to this controller fails without this clock.
> 
> 2. HDMI_RTX_RESET_CTL0 bits 6 and 7 are marked as "reserved" in the manual,
> but they are actually required to be configured. Bit 6 seems to keep something
> in the display pixel clock path in inactive state and Bit 7 seems to reset
> the HDMI TX i2c controller.
> 
> The HDMI blk-ctrl part is tested quite extensively with a PoC HDMI support
> patchset, which I will send out in a bit, so I'm pretty sure that the
> support as implemented is working. I've put the patches last in the series
> in case that this turns out to be controversial, so the other patches can
> be applied independent from the HDMI support.
> 
> Regards,
> Lucas
> 
> [1] https://lore.kernel.org/all/20220330104620.3600159-1-l.stach@pengutronix.de/
> 
> 
> Laurent Pinchart (1):
>   arm64: dts: imx8mp: Add MEDIAMIX power domains
> 
> Lucas Stach (7):
>   soc: imx: imx8m-blk-ctrl: set power device name
>   soc: imx: add i.MX8MP HSIO blk-ctrl
>   dt-bindings: power: imx8mp: add defines for HDMI blk-ctrl domains
>   dt-bindings: soc: add binding for i.MX8MP HDMI blk-ctrl
>   soc: imx: add i.MX8MP HDMI blk-ctrl
>   arm64: dts: imx8mp: add HSIO power-domains
>   arm64: dts: imx8mp: add HDMI power-domains
> 
> Paul Elder (3):
>   dt-bindings: soc: Add i.MX8MP media block control DT bindings
>   soc: imx: imx8m-blk-ctrl: Add i.MX8MP media blk-ctrl
>   arm64: dts: imx8mp: Add MEDIA_BLK_CTRL
> 
>  .../soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml     |  84 +++
>  .../soc/imx/fsl,imx8mp-media-blk-ctrl.yaml    | 104 +++
>  arch/arm64/boot/dts/freescale/imx8mp.dtsi     | 153 +++-
>  drivers/soc/imx/Makefile                      |   1 +
>  drivers/soc/imx/imx8m-blk-ctrl.c              | 124 +++-
>  drivers/soc/imx/imx8mp-blk-ctrl.c             | 696 ++++++++++++++++++
>  include/dt-bindings/power/imx8mp-power.h      |  18 +
>  7 files changed, 1172 insertions(+), 8 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml
>  create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml
>  create mode 100644 drivers/soc/imx/imx8mp-blk-ctrl.c
>