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From: "William.wu" <William.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
To: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: huangtao-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
	balbi-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org,
	sergei.shtylyov-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org,
	linux-usb-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	kever.yang-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
	dianders-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org,
	linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	eddie.cai-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
	briannorris-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	John.Youn-HKixBCOQz3hWk0Htik3J/w@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH v6 3/5] usb: dwc3: add phyif_utmi_quirk
Date: Wed, 13 Jul 2016 12:02:29 +0800	[thread overview]
Message-ID: <8c62e88e-aa13-a978-1b92-2fe942671c04@rock-chips.com> (raw)
In-Reply-To: <20160711145854.GB16636@rob-hp-laptop>

Dear Rob,


On 2016/7/11 22:58, Rob Herring wrote:
> On Thu, Jul 07, 2016 at 10:54:24AM +0800, William Wu wrote:
>> Add a quirk to configure the core to support the
>> UTMI+ PHY with an 8- or 16-bit interface. UTMI+ PHY
>> interface is hardware property, and it's platform
>> dependent. Normall, the PHYIf can be configured
> s/Normall/Normally/
Yeah，I'll fix it.:-)
> s/PHYIf/PHYIF/
Refer to DWC3 controller databook, "PHY Interface" called "PHYIf",
so I describe "PHYIf" here. However， "PHYIF”seems more the norm,
I'll fix it.:-)
>
>> during coreconsultant. But for some specific usb
> s/usb/USB/

Thanks, I'll fix it.:-)

>
>> cores(e.g. rk3399 soc dwc3), the default PHYIf
>> configuration value is fault, so we need to
>> reconfigure it by software.
>>
>> And refer to the dwc3 databook, the GUSB2PHYCFG.USBTRDTIM
> s/dwc3/DWC3/
Thanks, I'll fix it too.
>
>> must be set to the corresponding value according to
>> the UTMI+ PHY interface.
> And wrap your lines at 70-74 characters.

Thanks for your suggestion, I'll pay attention to this problem next 
patch.:-)

Best Regards，
         William Wu
>
> Rob
>
>
>



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  reply	other threads:[~2016-07-13  4:02 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-07  2:54 [PATCH v6 0/5] support rockchip dwc3 driver William Wu
     [not found] ` <1467860066-15142-1-git-send-email-william.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-07-07  2:54   ` [PATCH v6 1/5] usb: dwc3: of-simple: add compatible for rockchip rk3399 William Wu
2016-07-07  2:54   ` [PATCH v6 2/5] usb: dwc3: add dis_u2_freeclk_exists_quirk William Wu
2016-07-11 14:47     ` Rob Herring
2016-07-07  2:54   ` [PATCH v6 3/5] usb: dwc3: add phyif_utmi_quirk William Wu
     [not found]     ` <1467860066-15142-4-git-send-email-william.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-07-08 12:33       ` Heiko Stuebner
2016-07-08 13:29         ` Felipe Balbi
2016-07-09  3:38           ` William.wu
     [not found]             ` <f5daa697-3125-cfbf-7318-d4900f666362-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-07-09 23:47               ` Heiko Stuebner
2016-07-13  3:21                 ` William.wu
2016-07-11 14:54         ` Rob Herring
2016-07-13  3:39           ` William.wu
2016-07-11 14:58       ` Rob Herring
2016-07-13  4:02         ` William.wu [this message]
2016-07-07  2:54   ` [PATCH v6 4/5] usb: dwc3: add dis_del_phy_power_chg_quirk William Wu
2016-07-11 15:11     ` Rob Herring
2016-07-07  2:58   ` [PATCH v6 5/5] usb: dwc3: rockchip: add devicetree bindings documentation William Wu
     [not found]     ` <1467860324-15341-1-git-send-email-william.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-07-11 15:13       ` Rob Herring
2016-07-13  4:05         ` William.wu

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