From: Krzysztof Kozlowski <krzk@kernel.org>
To: "Roy Luo" <royluo@google.com>, "Vinod Koul" <vkoul@kernel.org>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Thinh Nguyen" <Thinh.Nguyen@synopsys.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Peter Griffin" <peter.griffin@linaro.org>,
"André Draszik" <andre.draszik@linaro.org>,
"Tudor Ambarus" <tudor.ambarus@linaro.org>
Cc: Joy Chakraborty <joychakr@google.com>,
Naveen Kumar <mnkumar@google.com>,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-samsung-soc@vger.kernel.org
Subject: Re: [PATCH v1 2/4] dt-bindings: usb: dwc3: Add Google SoC DWC3 USB
Date: Tue, 7 Oct 2025 09:44:17 +0900 [thread overview]
Message-ID: <8ca61364-df47-41f2-b0d1-f2a8a74ec728@kernel.org> (raw)
In-Reply-To: <20251006232125.1833979-3-royluo@google.com>
On 07/10/2025 08:21, Roy Luo wrote:
> Document the DWC3 USB bindings for Google Tensor SoCs.
>
> Signed-off-by: Roy Luo <royluo@google.com>
> ---
> .../bindings/usb/google,snps-dwc3.yaml | 144 ++++++++++++++++++
> 1 file changed, 144 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/usb/google,snps-dwc3.yaml
>
> diff --git a/Documentation/devicetree/bindings/usb/google,snps-dwc3.yaml b/Documentation/devicetree/bindings/usb/google,snps-dwc3.yaml
> new file mode 100644
> index 000000000000..3e8bcc0c2cef
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/google,snps-dwc3.yaml
> @@ -0,0 +1,144 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +# Copyright (c) 2025, Google LLC
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/usb/google,snps-dwc3.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Google DWC3 USB SoC Controller
> +
> +maintainers:
> + - Roy Luo <royluo@google.com>
> +
> +description:
> + Describes the Google DWC3 USB block, based on Synopsys DWC3 IP.
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - google,lga-dwc3
> + - const: google,snps-dwc3
There is no such soc as snps, so you grossly misuse other company name
as name of SoC. Neither lga. Otherwise please point me to the top-level
bindings describing that SoC.
You need to better describe the hardware here - why this is something
completely different than GS which. Or switch to existing bindings and
existing drivers. Did you align this with Peter Griffin?
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-10-07 0:44 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-06 23:21 [PATCH v1 0/4] Add Google Tensor SoC USB support Roy Luo
2025-10-06 23:21 ` [PATCH v1 1/4] usb: dwc3: Add Google SoC DWC3 glue driver Roy Luo
2025-10-07 0:46 ` Krzysztof Kozlowski
2025-10-07 18:08 ` Roy Luo
2025-10-11 3:39 ` kernel test robot
2025-10-06 23:21 ` [PATCH v1 2/4] dt-bindings: usb: dwc3: Add Google SoC DWC3 USB Roy Luo
2025-10-07 0:44 ` Krzysztof Kozlowski [this message]
2025-10-07 9:09 ` Peter Griffin
2025-10-07 14:18 ` Krzysztof Kozlowski
2025-10-07 18:49 ` Roy Luo
2025-10-06 23:21 ` [PATCH v1 3/4] usb: dwc3: Add Google SoC USB PHY driver Roy Luo
2025-10-07 0:42 ` Krzysztof Kozlowski
2025-10-07 5:51 ` Greg Kroah-Hartman
2025-10-07 18:57 ` Roy Luo
2025-10-06 23:21 ` [PATCH v1 4/4] dt-bindings: phy: google: Add Google SoC USB PHY Roy Luo
2025-10-07 0:45 ` Krzysztof Kozlowski
2025-10-07 19:04 ` Roy Luo
2025-10-07 1:06 ` [PATCH v1 0/4] Add Google Tensor SoC USB support Krzysztof Kozlowski
2025-10-07 18:03 ` Roy Luo
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