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[83.9.29.190]) by smtp.gmail.com with ESMTPSA id n7-20020a2e7207000000b002ad1ba6ee36sm370863ljc.140.2023.06.09.05.52.49 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 09 Jun 2023 05:52:50 -0700 (PDT) Message-ID: <8d1ead23-8361-7943-baba-baf20d16cbe5@linaro.org> Date: Fri, 9 Jun 2023 14:52:48 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.2 Subject: Re: [PATCH V4 4/4] arm64: dts: qcom: sm8550: Add camera clock controller Content-Language: en-US To: Jagadeesh Kona , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Bjorn Andersson , Vladimir Zapolskiy , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Taniya Das , Satya Priya Kakitapalli , Imran Shaik , Ajit Pandey References: <20230609115058.9059-1-quic_jkona@quicinc.com> <20230609115058.9059-5-quic_jkona@quicinc.com> From: Konrad Dybcio In-Reply-To: <20230609115058.9059-5-quic_jkona@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 9.06.2023 13:50, Jagadeesh Kona wrote: > Add device node for camera clock controller on Qualcomm > SM8550 platform. > > Signed-off-by: Taniya Das > Signed-off-by: Jagadeesh Kona > --- > Changes since V3: > - No changes > Changes since V2: > - No changes > Changes since V1: > - Padded non-zero address part to 8 hex digits > > arch/arm64/boot/dts/qcom/sm8550.dtsi | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi > index 75cd374943eb..4d2d610fc66a 100644 > --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi > @@ -5,6 +5,7 @@ > > #include > #include > +#include > #include > #include > #include > @@ -2419,6 +2420,20 @@ videocc: clock-controller@aaf0000 { > #power-domain-cells = <1>; > }; > > + camcc: clock-controller@ade0000 { > + compatible = "qcom,sm8550-camcc"; > + reg = <0 0x0ade0000 0 0x20000>; > + clocks = <&gcc GCC_CAMERA_AHB_CLK>, > + <&bi_tcxo_div2>, > + <&bi_tcxo_ao_div2>, > + <&sleep_clk>; > + power-domains = <&rpmhpd SM8550_MMCX>; I see that both MMCX ("mmcx.lvl") and MXC ("mxc.lvl") (and MX, FWIW) are consumed on msm-5.15, with the latter one powering camcc PLLs.. How are they related? Is that resolved internally or does it need manual intervention? Konrad > + required-opps = <&rpmhpd_opp_low_svs>; > + #clock-cells = <1>; > + #reset-cells = <1>; > + #power-domain-cells = <1>; > + }; > + > mdss: display-subsystem@ae00000 { > compatible = "qcom,sm8550-mdss"; > reg = <0 0x0ae00000 0 0x1000>;