From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CEC63566A; Wed, 17 Jul 2024 13:30:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721223047; cv=none; b=MKj8NYQEXRCqjbz50Ifa+It8lAYJbpR8XaNmsTdOtn8ZxqtdWEa+0JBjvAXIzy5BNxACZk6qaZfz8dOcYckte9vKHjHTlpFKo27whr2a78fVD6rPbxQ/iWnSe6w/8ewz60uapeh2JxxJ9tUAGXq2IGsN/t0D9v+HzGLx6V2Q54U= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721223047; c=relaxed/simple; bh=EjnGtehLHIKPE9q1cLN8XdIbtNHm5pvem+IG50mZpqA=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=IPX0l0tsQsQbXFKHMiVVvmljhqnY+WJCjxQ18Ep/xejdcQ1vNjM84vAVbZRiRn9zU84w25NmAJ8+HG5Jk2chAJZnmvycsPgMS4YrfetBQiqafS/3yCItA0MunJlL2+jcZDcdCQYW59UlkWreBo/fO8hc0n0T4fG9WW9bYxU2ziA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=MyxaDqzQ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="MyxaDqzQ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C1A0CC32782; Wed, 17 Jul 2024 13:30:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721223047; bh=EjnGtehLHIKPE9q1cLN8XdIbtNHm5pvem+IG50mZpqA=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=MyxaDqzQe01C+DLKfhrub218xtvehXwEJ/jjaDw1rOck7qXJ2xCdqL34iZtz4+zgS 0zSvUClqP3k0OWal6okIcuQH5BBAy6PQLuCo9n/NxSYTfF7ZdHJ8/84hvLatGO2eQF ysUPgnFY70DY/J7bVIqSLjxYmXw1rxwHWvlUkXvvSVzNze1qdU8Fm96lpN1qYFOxUp 9tjuaKqj21iI5pNlScumyJLJFw0da61JqXNqVAPD1Cumm534QHLoexXTXFXcRghVQT XWpVAEst3AYYmzQrIpmgCT4EpRJbqLDudYw/M5fCSHlhAwaWY/ZrZuNlkxM/ZXNI1r Z1BQRrIoCMeFw== Message-ID: <8e260164-cce2-4153-9f9c-0330c76408ef@kernel.org> Date: Wed, 17 Jul 2024 15:30:39 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 01/12] dt-bindings: PCI: Cleanup of brcmstb YAML and add 7712 SoC To: Jim Quinlan Cc: linux-pci@vger.kernel.org, Nicolas Saenz Julienne , Bjorn Helgaas , Lorenzo Pieralisi , Cyril Brulebois , Stanimir Varbanov , bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com, Florian Fainelli , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" , "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , open list References: <20240716213131.6036-1-james.quinlan@broadcom.com> <20240716213131.6036-2-james.quinlan@broadcom.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 8bit On 17/07/2024 15:20, Jim Quinlan wrote: > On Wed, Jul 17, 2024 at 2:51 AM Krzysztof Kozlowski wrote: >> >> On 16/07/2024 23:31, Jim Quinlan wrote: >>> o Change order of the compatible strings to be alphabetical >>> >>> o Describe resets/reset-names before using them in rules >>> >> >>
>> This is a friendly reminder during the review process. >> >> It seems my or other reviewer's previous comments were not fully >> addressed. Maybe the feedback got lost between the quotes, maybe you >> just forgot to apply it. Please go back to the previous discussion and >> either implement all requested changes or keep discussing them. >> >> Thank you. >>
> > I'm sorry Krzysztof, but AFAICT I paid attention to all of your comments and > tried to answer them as best as I could. Please do not resort to a > form letter; if > you think I missed something(s) please oblige me and say what it is rather than > having me search for something that you know and I do not. I do not see your response at all to my comments on patch #2. > >> >>> o Add minItems/maxItems where needed. >>> >>> o Change maintainer: Nicolas has not been active for a while. It also >>> makes sense for a Broadcom employee to be the maintainer as many of the >>> details are privy to Broadcom. >>> >>> Signed-off-by: Jim Quinlan >>> --- >>> .../bindings/pci/brcm,stb-pcie.yaml | 26 ++++++++++++++----- >>> 1 file changed, 19 insertions(+), 7 deletions(-) >>> >>> diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml >>> index 11f8ea33240c..692f7ed7c98e 100644 >>> --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml >>> +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml >>> @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# >>> title: Brcmstb PCIe Host Controller >>> >>> maintainers: >>> - - Nicolas Saenz Julienne >>> + - Jim Quinlan >>> >>> properties: >>> compatible: >>> @@ -16,11 +16,11 @@ properties: >>> - brcm,bcm2711-pcie # The Raspberry Pi 4 >>> - brcm,bcm4908-pcie >>> - brcm,bcm7211-pcie # Broadcom STB version of RPi4 >>> - - brcm,bcm7278-pcie # Broadcom 7278 Arm >>> - brcm,bcm7216-pcie # Broadcom 7216 Arm >>> - - brcm,bcm7445-pcie # Broadcom 7445 Arm >>> + - brcm,bcm7278-pcie # Broadcom 7278 Arm >>> - brcm,bcm7425-pcie # Broadcom 7425 MIPs >>> - brcm,bcm7435-pcie # Broadcom 7435 MIPs >>> + - brcm,bcm7445-pcie # Broadcom 7445 Arm >>> >>> reg: >>> maxItems: 1 >>> @@ -95,6 +95,18 @@ properties: >>> minItems: 1 >>> maxItems: 3 >>> >>> + resets: >>> + minItems: 1 >>> + items: >>> + - description: reset for external PCIe PERST# signal # perst >>> + - description: reset for phy reset calibration # rescal >>> + >>> + reset-names: >>> + minItems: 1 >>> + items: >>> + - const: perst >>> + - const: rescal >> >> There are no devices with two resets. Anyway, this does not match one of >> your variants which have first element as rescal. > > The 4908 chip exclusively uses the "perst" reset, and the 7216 chip > exclusively uses the "rescal" reset. The rest of the chips use zero > resets. All together, there are two resets. This is not enum, but a list. What you do mean overall two resets? You have a chip which is both 4908 and 7216 at the same time? How is this possible? > > You are the one that wanted me to first list all resets at the top, > and refer to them by the conditional rules. No, I wanted widest constraints at the top. My comment at v2 was already saying this: "This does not match what you have in conditional, so just keep min and max Items here." and you have numerous examples in the code for this. Best regards, Krzysztof