[PATCH 0/2] Enable iface clock for kodiak and monaco ice sdhc

[PATCH 0/2] Enable iface clock for kodiak and monaco ice sdhc

[Kuldeep Singh]

As ice is now standalone driver decoupled from ufs driver.
MMC ice controller should also now specify iface clock alongwith core
clock.

The patchset is motivation to fix ice mmc where ice ufs is fixed with
below series.
https://lore.kernel.org/linux-arm-msm/20260323-qcom_ice_power_and_clk_vote-v4-0-e36044bbdfe9@oss.qualcomm.com/T/#m5da5dd7a18318583b23ffeb42fa07ef1438042d5

Testing:
* dtbs check
* Custom monaco/kodiak device with emmc storage.

This series depends on the following prerequisite patchsets:

[1] Add explicit clock vote and enable power-domain for QCOM-ICE
    https://lore.kernel.org/linux-arm-msm/20260323-qcom_ice_power_and_clk_vote-v4-0-e36044bbdfe9@oss.qualcomm.com

[2] Enable Inline crypto engine for kodiak and monaco
    https://lore.kernel.org/lkml/20260310113557.348502-1-neeraj.soni@oss.qualcomm.com/

Signed-off-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>
---
Kuldeep Singh (2):
      arm64: dts: qcom: kodiak: Add iface clock for ice sdhc
      arm64: dts: qcom: monaco: Add iface clock for ice sdhc

 arch/arm64/boot/dts/qcom/kodiak.dtsi | 3 ++-
 arch/arm64/boot/dts/qcom/monaco.dtsi | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)
---
base-commit: 816f193dd0d95246f208590924dd962b192def78
change-id: 20260406-ice_emmc_clock_addition-e19f36c1fca5

Best regards,
--  
Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>

[PATCH 1/2] arm64: dts: qcom: kodiak: Add iface clock for ice sdhc

[Kuldeep Singh]

Qualcomm in-line crypto engine (ICE) platform driver specifies and votes
for its own resources. Before accessing ICE hardware during probe, to
avoid potential unclocked register access issues (when clk_ignore_unused
is not passed on the kernel command line), in addition to the 'core'
clock the 'iface' clock should also be turned on by the driver.

As bindings allow to specify 2 clocks, add iface clock now.

Signed-off-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/kodiak.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
index dda4697a61b7..5e6b659e8719 100644
--- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
+++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
@@ -1082,7 +1082,8 @@ sdhc_ice: crypto@7c8000 {
 			compatible = "qcom,sc7280-inline-crypto-engine",
 				     "qcom,inline-crypto-engine";
 			reg = <0x0 0x007c8000 0x0 0x18000>;
-			clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>;
+			clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
+			clock-names = "core", "iface";
 		};
 
 		gpi_dma0: dma-controller@900000 {

-- 
2.34.1

Re: [PATCH 1/2] arm64: dts: qcom: kodiak: Add iface clock for ice sdhc

[Dmitry Baryshkov]

On Mon, Apr 06, 2026 at 10:00:36PM +0530, Kuldeep Singh wrote:
> Qualcomm in-line crypto engine (ICE) platform driver specifies and votes
> for its own resources. Before accessing ICE hardware during probe, to
> avoid potential unclocked register access issues (when clk_ignore_unused
> is not passed on the kernel command line), in addition to the 'core'
> clock the 'iface' clock should also be turned on by the driver.
> 
> As bindings allow to specify 2 clocks, add iface clock now.
> 
> Signed-off-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/kodiak.dtsi | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
> index dda4697a61b7..5e6b659e8719 100644
> --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
> +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
> @@ -1082,7 +1082,8 @@ sdhc_ice: crypto@7c8000 {
>  			compatible = "qcom,sc7280-inline-crypto-engine",
>  				     "qcom,inline-crypto-engine";
>  			reg = <0x0 0x007c8000 0x0 0x18000>;
> -			clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>;
> +			clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
> +			clock-names = "core", "iface";

Inside the schema the clocks have maxItems:1. Please update the schema:
Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml

>  		};
>  
>  		gpi_dma0: dma-controller@900000 {
> 
> -- 
> 2.34.1
> 

-- 
With best wishes
Dmitry

Re: [PATCH 1/2] arm64: dts: qcom: kodiak: Add iface clock for ice sdhc

[Kuldeep Singh]

On 4/7/2026 12:43 AM, Dmitry Baryshkov wrote:
> On Mon, Apr 06, 2026 at 10:00:36PM +0530, Kuldeep Singh wrote:
>> Qualcomm in-line crypto engine (ICE) platform driver specifies and votes
>> for its own resources. Before accessing ICE hardware during probe, to
>> avoid potential unclocked register access issues (when clk_ignore_unused
>> is not passed on the kernel command line), in addition to the 'core'
>> clock the 'iface' clock should also be turned on by the driver.
>>
>> As bindings allow to specify 2 clocks, add iface clock now.
>>
>> Signed-off-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>
>> ---
>>  arch/arm64/boot/dts/qcom/kodiak.dtsi | 3 ++-
>>  1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
>> index dda4697a61b7..5e6b659e8719 100644
>> --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
>> @@ -1082,7 +1082,8 @@ sdhc_ice: crypto@7c8000 {
>>  			compatible = "qcom,sc7280-inline-crypto-engine",
>>  				     "qcom,inline-crypto-engine";
>>  			reg = <0x0 0x007c8000 0x0 0x18000>;
>> -			clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>;
>> +			clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
>> +			clock-names = "core", "iface";
> 
> Inside the schema the clocks have maxItems:1. Please update the schema:
> Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml

Thanks for review Dmitry.

Clocks maxItems are already 2 as per below dependent patch.
Kindly check cover letter for dependency to understand more.

https://lore.kernel.org/linux-arm-msm/20260323-qcom_ice_power_and_clk_vote-v4-0-e36044bbdfe9@oss.qualcomm.com/T/#m885402f4d828804501a3982ae8b8a5a028e15a89

-- 
Regards
Kuldeep

Re: [PATCH 1/2] arm64: dts: qcom: kodiak: Add iface clock for ice sdhc

[Konrad Dybcio]

On 4/6/26 6:30 PM, Kuldeep Singh wrote:
> Qualcomm in-line crypto engine (ICE) platform driver specifies and votes
> for its own resources. Before accessing ICE hardware during probe, to
> avoid potential unclocked register access issues (when clk_ignore_unused
> is not passed on the kernel command line), in addition to the 'core'
> clock the 'iface' clock should also be turned on by the driver.
> 
> As bindings allow to specify 2 clocks, add iface clock now.
> 
> Signed-off-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/kodiak.dtsi | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
> index dda4697a61b7..5e6b659e8719 100644
> --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
> +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
> @@ -1082,7 +1082,8 @@ sdhc_ice: crypto@7c8000 {
>  			compatible = "qcom,sc7280-inline-crypto-engine",
>  				     "qcom,inline-crypto-engine";
>  			reg = <0x0 0x007c8000 0x0 0x18000>;
> -			clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>;
> +			clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
> +			clock-names = "core", "iface";

nit: one a line would be preferred, please fix that up as you seemingly
need a v2 anyway

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad

Re: [PATCH 1/2] arm64: dts: qcom: kodiak: Add iface clock for ice sdhc

[Kuldeep Singh]

>> diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
>> index dda4697a61b7..5e6b659e8719 100644
>> --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
>> @@ -1082,7 +1082,8 @@ sdhc_ice: crypto@7c8000 {
>>  			compatible = "qcom,sc7280-inline-crypto-engine",
>>  				     "qcom,inline-crypto-engine";
>>  			reg = <0x0 0x007c8000 0x0 0x18000>;
>> -			clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>;
>> +			clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
>> +			clock-names = "core", "iface";
> 
> nit: one a line would be preferred, please fix that up as you seemingly
> need a v2 anyway

Hi Konrad, Didn't get your comment completely.

Do I need to send v2 to just fix clock entries in 2 lines?
Or some other comment to address and send v2 for that?
I don't see any other comment on patchset to address.

Kindly clarify.

-- 
Regards
Kuldeep

Re: [PATCH 1/2] arm64: dts: qcom: kodiak: Add iface clock for ice sdhc

[Konrad Dybcio]

On 4/7/26 1:09 PM, Kuldeep Singh wrote:
>>> diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
>>> index dda4697a61b7..5e6b659e8719 100644
>>> --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
>>> @@ -1082,7 +1082,8 @@ sdhc_ice: crypto@7c8000 {
>>>  			compatible = "qcom,sc7280-inline-crypto-engine",
>>>  				     "qcom,inline-crypto-engine";
>>>  			reg = <0x0 0x007c8000 0x0 0x18000>;
>>> -			clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>;
>>> +			clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
>>> +			clock-names = "core", "iface";
>>
>> nit: one a line would be preferred, please fix that up as you seemingly
>> need a v2 anyway
> 
> Hi Konrad, Didn't get your comment completely.
> 
> Do I need to send v2 to just fix clock entries in 2 lines?
> Or some other comment to address and send v2 for that?
> I don't see any other comment on patchset to address.

I didn't see your reply to Dmitry's initial comment about the DT bindings
requiring an update.

I'd prefer if you sent a v2 with that formatting change. Patches will not be
merged for some ~3 weeks now, due to the kernel release cycle so it'll have
to wait a bit anyway

Konrad

Re: [PATCH 1/2] arm64: dts: qcom: kodiak: Add iface clock for ice sdhc

[Kuldeep Singh]

On 4/7/2026 4:48 PM, Konrad Dybcio wrote:
> On 4/7/26 1:09 PM, Kuldeep Singh wrote:
>>>> diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
>>>> index dda4697a61b7..5e6b659e8719 100644
>>>> --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
>>>> +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
>>>> @@ -1082,7 +1082,8 @@ sdhc_ice: crypto@7c8000 {
>>>>  			compatible = "qcom,sc7280-inline-crypto-engine",
>>>>  				     "qcom,inline-crypto-engine";
>>>>  			reg = <0x0 0x007c8000 0x0 0x18000>;
>>>> -			clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>;
>>>> +			clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
>>>> +			clock-names = "core", "iface";
>>>
>>> nit: one a line would be preferred, please fix that up as you seemingly
>>> need a v2 anyway
>>
>> Hi Konrad, Didn't get your comment completely.
>>
>> Do I need to send v2 to just fix clock entries in 2 lines?
>> Or some other comment to address and send v2 for that?
>> I don't see any other comment on patchset to address.
> 
> I didn't see your reply to Dmitry's initial comment about the DT bindings
> requiring an update.

Here's my reply to Dmitry's comment.

https://lore.kernel.org/linux-arm-msm/f05ac643-1ec4-4700-aace-c1a9d0cd9e07@oss.qualcomm.com/

Bindings are updated with maxItems:2 in dependent patch series.

-- 
Regards
Kuldeep

[PATCH 2/2] arm64: dts: qcom: monaco: Add iface clock for ice sdhc

[Kuldeep Singh]

Qualcomm in-line crypto engine (ICE) platform driver specifies and votes
for its own resources. Before accessing ICE hardware during probe, to
avoid potential unclocked register access issues (when clk_ignore_unused
is not passed on the kernel command line), in addition to the 'core'
clock the 'iface' clock should also be turned on by the driver.

As bindings allow to specify 2 clocks, add iface clock now.

Signed-off-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/monaco.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
index 5fd289669353..e4bc1cc34097 100644
--- a/arch/arm64/boot/dts/qcom/monaco.dtsi
+++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
@@ -4873,7 +4873,8 @@ sdhc_ice: crypto@87c8000 {
 			compatible = "qcom,qcs8300-inline-crypto-engine",
 				     "qcom,inline-crypto-engine";
 			reg = <0x0 0x087c8000 0x0 0x18000>;
-			clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>;
+			clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
+			clock-names = "core", "iface";
 		};
 
 		usb_1_hsphy: phy@8904000 {

-- 
2.34.1

Re: [PATCH 2/2] arm64: dts: qcom: monaco: Add iface clock for ice sdhc

[Konrad Dybcio]

On 4/6/26 6:30 PM, Kuldeep Singh wrote:
> Qualcomm in-line crypto engine (ICE) platform driver specifies and votes
> for its own resources. Before accessing ICE hardware during probe, to
> avoid potential unclocked register access issues (when clk_ignore_unused
> is not passed on the kernel command line), in addition to the 'core'
> clock the 'iface' clock should also be turned on by the driver.
> 
> As bindings allow to specify 2 clocks, add iface clock now.
> 
> Signed-off-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad