From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Guo Mengqi <guomengqi3@huawei.com>,
vkoul@kernel.org, dmaengine@vger.kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
devicetree@vger.kernel.org
Cc: xuqiang36@huawei.com, chenweilong@huawei.com
Subject: Re: [PATCH v4 2/2] dt-bindings: dma: HiSilicon: Add bindings for HiSilicon Ascend sdma
Date: Wed, 13 Sep 2023 11:20:32 +0200 [thread overview]
Message-ID: <8eff1f20-1cfc-7097-da26-97daaae5e8ca@linaro.org> (raw)
In-Reply-To: <20230913082825.3180-3-guomengqi3@huawei.com>
On 13/09/2023 10:28, Guo Mengqi wrote:
> Add device-tree binding documentation for sdma hardware on
> HiSilicon Ascend SoC families.
>
> Signed-off-by: Guo Mengqi <guomengqi3@huawei.com>
> ---
> + dma-channel-mask:
> + minItems: 1
> + maxItems: 2
Why 2? Care to bring any example? Where is your DTS?
> + iommus:
> + maxItems: 1
> +
> + pasid-num-bits:
> + description: |
> + This tells smmu that this device supports iommu-sva feature.
> + This determines the maximum number of digits in the pasid.
> + maximum: 0x10
> +
> + dma-coherent: true
> +
> + dma-can-stall: true
> +
> +required:
> + - compatible
> + - reg
> + - dma-channel-mask
> + - '#dma-cells'
> + - iommus
> + - pasid-num-bits
> + - dma-can-stall
I am not sure if requiring dma-can-stall is correct here. To my
understanding this is in general optional property.
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-09-13 9:20 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-13 8:28 [PATCH v4 0/2] Add dma controller driver for HiSilicon Ascend310/910 Guo Mengqi
2023-09-13 8:28 ` [PATCH v4 1/2] dmaengine: Add HiSilicon Ascend SDMA engine support Guo Mengqi
2023-09-13 10:02 ` Krzysztof Kozlowski
2023-09-13 8:28 ` [PATCH v4 2/2] dt-bindings: dma: HiSilicon: Add bindings for HiSilicon Ascend sdma Guo Mengqi
2023-09-13 9:20 ` Krzysztof Kozlowski [this message]
2023-09-15 7:07 ` guomengqi (A)
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