From: Xingyu Wu <xingyu.wu@starfivetech.com>
To: Andreas Schwab <schwab@suse.de>
Cc: <linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
"Michael Turquette" <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Conor Dooley <conor@kernel.org>,
"Emil Renner Berthing" <kernel@esmil.dk>,
Rob Herring <robh+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Hal Feng <hal.feng@starfivetech.com>,
<linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>
Subject: Re: [PATCH v5 08/10] reset: starfive: jh7110: Add StarFive STG/ISP/VOUT resets support
Date: Thu, 18 May 2023 09:22:59 +0800 [thread overview]
Message-ID: <901dd93d-bd79-a62f-1ada-0328a5f04737@starfivetech.com> (raw)
In-Reply-To: <mvmsfbvgkom.fsf@suse.de>
On 2023/5/17 21:19, Andreas Schwab wrote:
> On Apr 24 2023, Xingyu Wu wrote:
>
>> @@ -58,6 +76,18 @@ static const struct auxiliary_device_id jh7110_reset_ids[] = {
>> .name = "clk_starfive_jh7110_sys.rst-aon",
>> .driver_data = (kernel_ulong_t)&jh7110_aon_info,
>> },
>> + {
>> + .name = "clk_starfive_jh7110_sys.rst-stg",
>> + .driver_data = (kernel_ulong_t)&jh7110_stg_info,
>> + },
>> + {
>> + .name = "clk_starfive_jh7110_sys.rst-isp",
>> + .driver_data = (kernel_ulong_t)&jh7110_isp_info,
>> + },
>> + {
>> + .name = "clk_starfive_jh7110_sys.rst-vout",
>
> "clk_starfive_jh7110_sys.rst-vout" is exactly AUXILIARY_NAME_SIZE long,
> thus lacks a null termination.
>
Yeah, it should be modified to "clk_starfive_jh7110_sys.rst-vo" in this and
use "rst-vo" instead of "rst-vout" in the probe of vout clock driver.
Then it will work.
Best regards,
Xingyu Wu
next prev parent reply other threads:[~2023-05-18 1:24 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-24 13:53 [PATCH v5 00/10] Add STG/ISP/VOUT clock and reset drivers for StarFive JH7110 Xingyu Wu
2023-04-24 13:54 ` [PATCH v5 01/10] dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator Xingyu Wu
2023-04-24 13:54 ` [PATCH v5 02/10] clk: starfive: Add StarFive JH7110 System-Top-Group clock driver Xingyu Wu
2023-04-24 13:54 ` [PATCH v5 03/10] dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator Xingyu Wu
2023-04-24 13:54 ` [PATCH v5 04/10] clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver Xingyu Wu
2023-05-11 6:48 ` Xingyu Wu
2023-04-24 13:54 ` [PATCH v5 05/10] dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator Xingyu Wu
2023-04-24 13:54 ` [PATCH v5 06/10] clk: starfive: Add StarFive JH7110 Video-Output clock driver Xingyu Wu
2023-05-14 21:46 ` Aurelien Jarno
2023-05-15 3:23 ` Xingyu Wu
2023-04-24 13:54 ` [PATCH v5 07/10] MAINTAINERS: Update maintainer of JH71x0 clock drivers Xingyu Wu
2023-04-24 13:54 ` [PATCH v5 08/10] reset: starfive: jh7110: Add StarFive STG/ISP/VOUT resets support Xingyu Wu
2023-05-17 13:19 ` Andreas Schwab
2023-05-18 1:22 ` Xingyu Wu [this message]
2023-04-24 13:54 ` [PATCH v5 09/10] riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks Xingyu Wu
2023-04-24 13:54 ` [PATCH v5 10/10] riscv: dts: starfive: jh7110: Add STGCRG/ISPCRG/VOUTCRG nodes Xingyu Wu
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