From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Ewvz7udj" Received: from mail-lj1-x22c.google.com (mail-lj1-x22c.google.com [IPv6:2a00:1450:4864:20::22c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 061141BD for ; Wed, 22 Nov 2023 12:10:00 -0800 (PST) Received: by mail-lj1-x22c.google.com with SMTP id 38308e7fff4ca-2c4fdf94666so2266171fa.2 for ; Wed, 22 Nov 2023 12:09:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1700683798; x=1701288598; darn=vger.kernel.org; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=6oN/ChfT8e0nycA2Y45oH8F8aAL5FUndvODmKzayhWU=; b=Ewvz7udjv2xjoBcffDVT43fZVbbNIRZdQB9wfpXvCspkBa2d3lATT9kZw/OIb4dutO DllBaqmw8lCWEUxBvGRfqaSoXiGw4TgwDmbnZw6GJkmTxgdlnZztWtes9W6pv4wpcjtj rjW+j+5p0xQRYkjsZ1VFIDPkwSdH2SI/MXcnqW230Ltx4+cSyWirKVr17faN2Yjd0IMX SHhKuaec3PBwq7Vw1AGJbk5dOMw0pFBjmCExk+gXYJ5rH8klLwt03cHeY2HE6L8/c0tH NYzRvd5Ou+n/fOOfamIFbXxN53j17DheG5VTfz6pFMIZ4qN9X/HC4jzHRQ9R+O1Wr1Sk tkzg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1700683798; x=1701288598; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=6oN/ChfT8e0nycA2Y45oH8F8aAL5FUndvODmKzayhWU=; b=sUjxU093/GMfcbEBNvFiV8IW0u17PL3NSJrwnb4Tr7INbXyhfykfRUud9kIErLLGYo acE0N5xwRvc9SJjY8Zzm3BIXHYLldKfdJEg/FRvGWHVtO6HRFHGvxWfkyaNio04U5KGT CfY2CGfgqD35kfewqI8AezDIxgKEkRlZ3I0rs1eKodWZSoftasMWhUL27ire0inDcBPi +TmAphioayBzKQd+r+FYSmp6Ulf36BL4qTyxG1t6QOSZuKRN79Q8O8aV2GCXJircOBob EbxZSJH2vG8eYwwUwj3se1qfj0t5SJgVHfIe17pGddvtS1IgPG4wyn3quTTNvSHQ25cx Awlw== X-Gm-Message-State: AOJu0Ywj0PID8qkBdhlLUE/P2IT8mUSsGH8e6tIiSJSZ4b7MhSuUyF/V JRxKk9OhaZPSwidWduJDot8BZQ== X-Google-Smtp-Source: AGHT+IE/Laar5BAe/Ut2eWzKinuOOq4h3ahqPOZfbrEwTg8LRJ8HKRRN3AqS36Kxn4ieIK8bY/3SVg== X-Received: by 2002:a2e:828d:0:b0:2c6:eb1c:10d1 with SMTP id y13-20020a2e828d000000b002c6eb1c10d1mr2244801ljg.25.1700683798165; Wed, 22 Nov 2023 12:09:58 -0800 (PST) Received: from [172.30.204.74] (UNUSED.212-182-62-129.lubman.net.pl. [212.182.62.129]) by smtp.gmail.com with ESMTPSA id q8-20020a2e9688000000b002bcdbfe36b9sm38083lji.111.2023.11.22.12.09.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 22 Nov 2023 12:09:57 -0800 (PST) Message-ID: <90885d90-2e25-404b-b3a3-13d134801146@linaro.org> Date: Wed, 22 Nov 2023 21:09:54 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V4 2/4] clk: qcom: branch: Add mem ops support for branch2 clocks Content-Language: en-US To: Imran Shaik , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Taniya Das , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Ajit Pandey , Jagadeesh Kona References: <20231117095558.3313877-1-quic_imrashai@quicinc.com> <20231117095558.3313877-3-quic_imrashai@quicinc.com> From: Konrad Dybcio In-Reply-To: <20231117095558.3313877-3-quic_imrashai@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Level: * On 11/17/23 10:55, Imran Shaik wrote: > From: Taniya Das > > Add the support for mem ops implementation to handle the sequence of > enable/disable of the memories in ethernet PHY, prior to enable/disable > of the respective clocks, which helps retain the respecive block's > register contents. > > Signed-off-by: Taniya Das > Signed-off-by: Imran Shaik > --- > drivers/clk/qcom/clk-branch.c | 39 +++++++++++++++++++++++++++++++++++ > drivers/clk/qcom/clk-branch.h | 21 +++++++++++++++++++ > 2 files changed, 60 insertions(+) > > diff --git a/drivers/clk/qcom/clk-branch.c b/drivers/clk/qcom/clk-branch.c > index fc4735f74f0f..61bdd2147bed 100644 > --- a/drivers/clk/qcom/clk-branch.c > +++ b/drivers/clk/qcom/clk-branch.c > @@ -1,6 +1,7 @@ > // SPDX-License-Identifier: GPL-2.0 > /* > * Copyright (c) 2013, The Linux Foundation. All rights reserved. > + * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. > */ > > #include > @@ -134,6 +135,44 @@ static void clk_branch2_disable(struct clk_hw *hw) > clk_branch_toggle(hw, false, clk_branch2_check_halt); > } > > +static int clk_branch2_mem_enable(struct clk_hw *hw) > +{ > + struct clk_mem_branch *mem_br = to_clk_mem_branch(hw); > + struct clk_branch branch = mem_br->branch; > + const char *name = clk_hw_get_name(&branch.clkr.hw); Bit of a microoptimization, but adding this implicitly in the WARN would only execute clk_hw_get_name when necessary > + u32 val; > + int ret; > + > + regmap_update_bits(branch.clkr.regmap, mem_br->mem_enable_reg, > + mem_br->mem_enable_ack_mask, mem_br->mem_enable_ack_mask); It's quite a nit from me, but it would be nice to have the next line aligned with the opening brace (with a tab size of 8) Konrad