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AJvYcCUVbG3+QoQqbNX4GLwHWZdzzz/wX7nl38PS/13wkAclXj3Rz+Uy8vSaRQLZ8UVBrgnX62UeMqV1SMacEsLeX/OpByeuavxDSTZsrw== X-Gm-Message-State: AOJu0YymirTWhTkXDtGrDGwwR+gy3WiOqTNBZ05QP4wVTsm0PRaaBCZi 0FGuJFh/Fr3uEcT+vdi/n8VdVHbt0Pxuy2RRDGYXunhijKycphCkGW87tNd1fcU= X-Google-Smtp-Source: AGHT+IG7HDx2+AdxqahzNH7iyEFC9rGrJpKDudbwOlrJIC/1s7QOXQZz7eUKgfpp4ZPXuAssY8mYtA== X-Received: by 2002:a05:6512:2355:b0:52c:9468:c991 with SMTP id 2adb3069b0e04-52ce1832bffmr3986238e87.14.1719292024114; Mon, 24 Jun 2024 22:07:04 -0700 (PDT) Received: from [192.168.50.4] ([82.78.167.70]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4249b4232f9sm6119065e9.0.2024.06.24.22.07.02 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 24 Jun 2024 22:07:03 -0700 (PDT) Message-ID: <908ff65d-e9f0-47c2-94ab-47cac3aa58ce@tuxon.dev> Date: Tue, 25 Jun 2024 08:07:00 +0300 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 08/12] dt-bindings: i2c: renesas,riic: Document the R9A08G045 support Content-Language: en-US To: Geert Uytterhoeven Cc: chris.brandt@renesas.com, andi.shyti@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, magnus.damm@gmail.com, mturquette@baylibre.com, sboyd@kernel.org, p.zabel@pengutronix.de, wsa+renesas@sang-engineering.com, linux-renesas-soc@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Claudiu Beznea References: <20240621112303.1607621-1-claudiu.beznea.uj@bp.renesas.com> <20240621112303.1607621-9-claudiu.beznea.uj@bp.renesas.com> From: claudiu beznea In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Hi, Geert, On 24.06.2024 18:40, Geert Uytterhoeven wrote: > Hi Claudiu, > > On Fri, Jun 21, 2024 at 1:23 PM Claudiu wrote: >> From: Claudiu Beznea >> >> Document the Renesas RZ/G3S (R9A08G045) RIIC IP. This is compatible with >> the version available on Renesas RZ/V2H (R9A09G075). Most of the IP >> variants that the RIIC driver is working with supports fast mode plus. >> However, it happens that on the same SoC to have IP instatiations that >> support fast mode plus as well as IP instantiation that doesn't support >> it. For this, introduced the renesas,riic-no-fast-mode-plus property. >> >> Signed-off-by: Claudiu Beznea > > Thanks for your patch! > >> --- a/Documentation/devicetree/bindings/i2c/renesas,riic.yaml >> +++ b/Documentation/devicetree/bindings/i2c/renesas,riic.yaml >> @@ -25,6 +25,10 @@ properties: >> - renesas,riic-r9a07g054 # RZ/V2L >> - const: renesas,riic-rz # RZ/A or RZ/G2L >> >> + - items: >> + - const: renesas,riic-r9a08g045 # RZ/G3S >> + - const: renesas,riic-r9a09g057 >> + > > LGTM. > >> - const: renesas,riic-r9a09g057 # RZ/V2H(P) >> >> reg: >> @@ -66,6 +70,10 @@ properties: >> resets: >> maxItems: 1 >> >> + renesas,riic-no-fast-mode-plus: >> + description: specifies if fast mode plus is not supported >> + type: boolean >> + > > Do you really need this? > The bus' clock-frequency property should take into account the combined > capabilities of all of controller, target, and wiring. It is up to the > DTS writer to validate that all timing conditions are met. On a second thought, I tend to agree with you on this. I added it to comply with "chapter 47.5.15 I2C Bus Interface Access Timing, note 7, Tfmin cannot meet the specification in fast-mode plus for the RIIC ch2 and ch3" statement from hw manual. Thank you, Claudiu Beznea > >> required: >> - compatible >> - reg > > Gr{oetje,eeting}s, > > Geert >