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Tue, 30 Jun 2026 07:21:51 -0700 (PDT) X-Received: by 2002:a05:6102:4488:b0:739:97bf:9180 with SMTP id ada2fe7eead31-73a39752cbbmr575205137.8.1782829310769; Tue, 30 Jun 2026 07:21:50 -0700 (PDT) Received: from [192.168.120.170] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6987c21f123sm1380324a12.0.2026.06.30.07.21.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 30 Jun 2026 07:21:49 -0700 (PDT) Message-ID: <917f606b-55f9-416a-8dc0-e66efac712bb@oss.qualcomm.com> Date: Tue, 30 Jun 2026 16:21:46 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 10/13] clk: qcom: dispcc-sm8750: Add support to control MDP clocks using CESTA To: Jagadeesh Kona , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd , Neil Armstrong , Lee Jones Cc: Ajit Pandey , Imran Shaik , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Maulik Shah , Taniya Das References: <20260420-cesta-sm870-dispcc-v1-0-eb27d845df9c@oss.qualcomm.com> <20260420-cesta-sm870-dispcc-v1-10-eb27d845df9c@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260420-cesta-sm870-dispcc-v1-10-eb27d845df9c@oss.qualcomm.com> Content-Type: text/plain; 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If display CRM is > enabled, the clock ops of these clocks will be updated by the common code > before registration to use CRM specific clock ops, allowing these clocks > to be controlled using display CRM (CESTA Resource Manager) hardware. Does CESTA only control a very thin slice of the total set of clocks (in this case MDP clock and PLL0), requiring Linux to still vote on the other couple dozen manually? Konrad