From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Hal Feng <hal.feng@starfivetech.com>
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
linux-clk@vger.kernel.org, Conor Dooley <conor@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Emil Renner Berthing <emil.renner.berthing@canonical.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 09/14] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator
Date: Wed, 30 Nov 2022 16:19:06 +0100 [thread overview]
Message-ID: <9183bac6-121e-0027-a88b-d77d5c9a077e@linaro.org> (raw)
In-Reply-To: <98d1bac7-8af5-f481-59b2-d58ca4c228ee@starfivetech.com>
On 30/11/2022 16:12, Hal Feng wrote:
> On Wed, 30 Nov 2022 12:48:30 +0100, Krzysztof Kozlowski wrote:
>> On 30/11/2022 10:47, Hal Feng wrote:
>>> On Fri, 25 Nov 2022 14:41:12 +0800, Hal Feng wrote:
>>>> On Mon, 21 Nov 2022 09:47:08 +0100, Krzysztof Kozlowski wrote:
>>>>> On 18/11/2022 02:06, Hal Feng wrote:
>>>>>> From: Emil Renner Berthing <kernel@esmil.dk>
>>>>>>
>>>>>> Add bindings for the system clock and reset generator (SYSCRG) on the
>>>>>> JH7110 RISC-V SoC by StarFive Ltd.
>>>>>>
>>>>>> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
>>>>>> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
>>>>>
>>>>> Binding headers are coming with the file bringing bindings for the
>>>>> device, so you need to squash patches.
>>>>
>>>> As we discussed in patch 7, could I merge patch 7, 8, 9, 10 and add the
>>>> following files in one commit?
>>>>
>>>> include/dt-bindings/clock/starfive,jh7110-crg.h
>>>> include/dt-bindings/reset/starfive,jh7110-crg.h
>>>> Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml
>>>> Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml
>>>
>>> Hi, Krzysztof,
>>>
>>> Could you please give me some suggestions?
>>
>> You can keep aon and sys split. First add one of them with their own
>> headers. Then add second with their own defines.
>
> You mean split patch 7 and patch 8 into sys part and aon part
> respectively? There are totally five regions (sys/aon/stg/isp/vout)
> for clocks and resets in JH7110. If we do that, there will be 5
> headers for JH7110 in either clock or reset directory finally. Is
> that OK if there are too many headers for just one SoC?
Sorry, I lost the track of what patches you have. The comment was -
bindings include both the doc and headers. You want to split some, some
merge, sorry, no clue. I did not propose splitting headers...
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-11-30 15:19 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-18 1:06 [PATCH v2 00/14] Basic clock and reset support for StarFive JH7110 RISC-V SoC Hal Feng
2022-11-18 1:06 ` [PATCH v2 01/14] clk: starfive: Factor out common JH7100 and JH7110 code Hal Feng
2022-11-18 16:22 ` Emil Renner Berthing
2022-11-21 6:25 ` Hal Feng
2022-11-18 1:06 ` [PATCH v2 02/14] clk: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng
2022-11-18 16:26 ` Emil Renner Berthing
2022-11-21 7:16 ` Hal Feng
2022-11-21 11:32 ` Emil Renner Berthing
2022-11-21 13:13 ` Hal Feng
2022-11-18 1:06 ` [PATCH v2 03/14] reset: Create subdirectory for StarFive drivers Hal Feng
2022-11-18 16:29 ` Emil Renner Berthing
2022-11-18 1:06 ` [PATCH v2 04/14] reset: starfive: Factor out common JH71X0 reset code Hal Feng
2022-11-18 16:39 ` Emil Renner Berthing
2022-11-21 9:23 ` Hal Feng
2022-11-21 11:26 ` Emil Renner Berthing
2022-11-18 1:06 ` [PATCH v2 05/14] reset: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng
2022-11-18 1:06 ` [PATCH v2 06/14] reset: starfive: jh71x0: Use 32bit I/O on 32bit registers Hal Feng
2022-11-18 1:06 ` [PATCH v2 07/14] dt-bindings: clock: Add StarFive JH7110 system and always-on clock definitions Hal Feng
2022-11-21 8:45 ` Krzysztof Kozlowski
2022-11-22 1:02 ` Hal Feng
2022-11-22 7:41 ` Krzysztof Kozlowski
2022-11-22 8:04 ` Hal Feng
2022-11-23 9:34 ` Krzysztof Kozlowski
2022-11-18 1:06 ` [PATCH v2 08/14] dt-bindings: reset: Add StarFive JH7110 system and always-on reset definitions Hal Feng
2022-11-18 16:47 ` Emil Renner Berthing
2022-11-22 1:20 ` Hal Feng
2022-11-21 8:45 ` Krzysztof Kozlowski
2022-11-21 8:50 ` Krzysztof Kozlowski
2022-11-22 1:26 ` Hal Feng
2022-11-18 1:06 ` [PATCH v2 09/14] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator Hal Feng
2022-11-18 16:50 ` Emil Renner Berthing
2022-11-21 8:47 ` Krzysztof Kozlowski
2022-11-22 1:45 ` Hal Feng
2022-11-21 8:47 ` Krzysztof Kozlowski
2022-11-25 6:41 ` Hal Feng
2022-11-30 9:47 ` Hal Feng
2022-11-30 11:48 ` Krzysztof Kozlowski
2022-11-30 15:12 ` Hal Feng
2022-11-30 15:19 ` Krzysztof Kozlowski [this message]
2022-11-30 18:05 ` Hal Feng
2022-12-01 10:21 ` Krzysztof Kozlowski
2022-12-02 2:06 ` Hal Feng
2022-11-18 1:06 ` [PATCH v2 10/14] dt-bindings: clock: Add StarFive JH7110 always-on " Hal Feng
2022-11-21 8:49 ` Krzysztof Kozlowski
2022-11-21 11:38 ` Emil Renner Berthing
2022-11-21 13:24 ` Krzysztof Kozlowski
2022-11-18 1:06 ` [PATCH v2 11/14] clk: starfive: Add StarFive JH7110 system clock driver Hal Feng
2022-11-18 17:03 ` Emil Renner Berthing
2022-11-25 2:33 ` Hal Feng
2022-11-18 1:06 ` [PATCH v2 12/14] clk: starfive: Add StarFive JH7110 always-on " Hal Feng
2022-11-18 1:06 ` [PATCH v2 13/14] reset: starfive: Add StarFive JH7110 reset driver Hal Feng
2022-11-18 17:14 ` Emil Renner Berthing
2022-11-22 5:55 ` Hal Feng
2022-11-18 1:06 ` [PATCH v2 14/14] clk: starfive: jh71x0: Don't register aux devices if JH7110 reset is disabled Hal Feng
2022-11-18 17:18 ` Emil Renner Berthing
2022-11-22 6:12 ` Hal Feng
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