From: Matthias Brugger <matthias.bgg@gmail.com>
To: Shuijing Li <shuijing.li@mediatek.com>,
chunkuang.hu@kernel.org, p.zabel@pengutronix.de,
airlied@gmail.com, daniel@ffwll.ch,
angelogioacchino.delregno@collabora.com, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org
Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Project_Global_Chrome_Upstream_Group@mediatek.com,
jitao.shi@mediatek.com
Subject: Re: [PATCH v2,3/3] drm/mediatek: dsi: Add dsi cmdq_ctl to send panel initial code
Date: Mon, 19 Jun 2023 17:20:53 +0200 [thread overview]
Message-ID: <91e84965-f44c-e5a5-67a8-e6d286a6ad99@gmail.com> (raw)
In-Reply-To: <20230616073659.26536-4-shuijing.li@mediatek.com>
On 16/06/2023 09:36, Shuijing Li wrote:
> For mt8188, add dsi cmdq reg control to send long packets to panel
> initialization.
>
> Signed-off-by: Shuijing Li <shuijing.li@mediatek.com>
> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
> ---
> Changes in v2:
> use mtk_dsi_mask(dsi, DSI_CMDQ_SIZE, CMDQ_SIZE_SEL, CMDQ_SIZE_SEL); directly,
> per suggestion from the previous thread:
> https://lore.kernel.org/lkml/015f4c60-ed77-9e1f-8a6b-cda6e4f6ac93@gmail.com/
> ---
> drivers/gpu/drm/mediatek/mtk_dsi.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index 500a3054282d..8b43d9f48178 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -86,6 +86,7 @@
>
> #define DSI_CMDQ_SIZE 0x60
> #define CMDQ_SIZE 0x3f
> +#define CMDQ_SIZE_SEL BIT(15)
>
> #define DSI_HSTX_CKL_WC 0x64
>
> @@ -178,6 +179,7 @@ struct mtk_dsi_driver_data {
> const u32 reg_cmdq_off;
> bool has_shadow_ctl;
> bool has_size_ctl;
> + bool cmdq_long_packet_ctl;
> };
>
> struct mtk_dsi {
> @@ -996,6 +998,8 @@ static void mtk_dsi_cmdq(struct mtk_dsi *dsi, const struct mipi_dsi_msg *msg)
>
> mtk_dsi_mask(dsi, reg_cmdq_off, cmdq_mask, reg_val);
> mtk_dsi_mask(dsi, DSI_CMDQ_SIZE, CMDQ_SIZE, cmdq_size);
> + if (dsi->driver_data->cmdq_long_packet_ctl)
> + mtk_dsi_mask(dsi, DSI_CMDQ_SIZE, CMDQ_SIZE_SEL, CMDQ_SIZE_SEL);
> }
>
> static ssize_t mtk_dsi_host_send_cmd(struct mtk_dsi *dsi,
> @@ -1200,18 +1204,21 @@ static const struct mtk_dsi_driver_data mt8183_dsi_driver_data = {
> .reg_cmdq_off = 0x200,
> .has_shadow_ctl = true,
> .has_size_ctl = true,
> + .cmdq_long_packet_ctl = false,
> };
>
> static const struct mtk_dsi_driver_data mt8186_dsi_driver_data = {
> .reg_cmdq_off = 0xd00,
> .has_shadow_ctl = true,
> .has_size_ctl = true,
> + .cmdq_long_packet_ctl = false,
> };
>
> static const struct mtk_dsi_driver_data mt8188_dsi_driver_data = {
> .reg_cmdq_off = 0xd00,
> .has_shadow_ctl = true,
> .has_size_ctl = true,
> + .cmdq_long_packet_ctl = true,
> };
>
> static const struct of_device_id mtk_dsi_of_match[] = {
next prev parent reply other threads:[~2023-06-19 15:21 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-16 7:36 [PATCH v2,0/3] Add mt8188 compatiable for DSI cmd packet control Shuijing Li
2023-06-16 7:36 ` [PATCH v2,1/3] dt-bindings: display: mediatek: dsi: Add compatible for MediaTek MT8188 Shuijing Li
2023-06-16 7:36 ` [PATCH v2,2/3] drm/mediatek: Add mt8188 dsi compatible to mtk_dsi.c Shuijing Li
2023-09-07 6:08 ` CK Hu (胡俊光)
2023-09-07 6:12 ` CK Hu (胡俊光)
2023-06-16 7:36 ` [PATCH v2,3/3] drm/mediatek: dsi: Add dsi cmdq_ctl to send panel initial code Shuijing Li
2023-06-19 15:20 ` Matthias Brugger [this message]
2023-09-07 6:21 ` [PATCH v2, 3/3] " CK Hu (胡俊光)
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