* [PATCH] dt-bindings: phy: ti: phy-gmii-sel: Add support for J784S4 CPSW9G
@ 2023-03-15 9:24 Siddharth Vadapalli
2023-03-19 12:45 ` Krzysztof Kozlowski
2023-04-12 16:38 ` Vinod Koul
0 siblings, 2 replies; 4+ messages in thread
From: Siddharth Vadapalli @ 2023-03-15 9:24 UTC (permalink / raw)
To: vkoul, kishon, robh+dt, krzysztof.kozlowski,
krzysztof.kozlowski+dt
Cc: linux-phy, devicetree, linux-kernel, linux-arm-kernel, srk,
s-vadapalli
The CPSW9G instance of CPSW Ethernet Switch on TI's J784S4 SoC supports
additional PHY modes like QSGMII. Add a compatible for it.
Enable the use of "ti,qsgmii-main-ports" property for J784S4 CPSW9G.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml b/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml
index 6d46f57fa1b4..3f2c5e2a11d5 100644
--- a/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml
+++ b/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml
@@ -55,6 +55,7 @@ properties:
- ti,am654-phy-gmii-sel
- ti,j7200-cpsw5g-phy-gmii-sel
- ti,j721e-cpsw9g-phy-gmii-sel
+ - ti,j784s4-cpsw9g-phy-gmii-sel
reg:
maxItems: 1
@@ -87,6 +88,7 @@ allOf:
- ti,am654-phy-gmii-sel
- ti,j7200-cpsw5g-phy-gmii-sel
- ti,j721e-cpsw9g-phy-gmii-sel
+ - ti,j784s4-cpsw9g-phy-gmii-sel
then:
properties:
'#phy-cells':
@@ -113,6 +115,7 @@ allOf:
contains:
enum:
- ti,j721e-cpsw9g-phy-gmii-sel
+ - ti,j784s4-cpsw9g-phy-gmii-sel
then:
properties:
ti,qsgmii-main-ports:
@@ -130,6 +133,7 @@ allOf:
enum:
- ti,j7200-cpsw5g-phy-gmii-sel
- ti,j721e-cpsw9g-phy-gmii-sel
+ - ti,j784s4-cpsw9g-phy-gmii-sel
then:
properties:
ti,qsgmii-main-ports: false
--
2.25.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH] dt-bindings: phy: ti: phy-gmii-sel: Add support for J784S4 CPSW9G
2023-03-15 9:24 [PATCH] dt-bindings: phy: ti: phy-gmii-sel: Add support for J784S4 CPSW9G Siddharth Vadapalli
@ 2023-03-19 12:45 ` Krzysztof Kozlowski
2023-04-04 7:09 ` Siddharth Vadapalli
2023-04-12 16:38 ` Vinod Koul
1 sibling, 1 reply; 4+ messages in thread
From: Krzysztof Kozlowski @ 2023-03-19 12:45 UTC (permalink / raw)
To: Siddharth Vadapalli, vkoul, kishon, robh+dt,
krzysztof.kozlowski+dt
Cc: linux-phy, devicetree, linux-kernel, linux-arm-kernel, srk
On 15/03/2023 10:24, Siddharth Vadapalli wrote:
> The CPSW9G instance of CPSW Ethernet Switch on TI's J784S4 SoC supports
> additional PHY modes like QSGMII. Add a compatible for it.
>
> Enable the use of "ti,qsgmii-main-ports" property for J784S4 CPSW9G.
>
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
> ---
> Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml | 4 ++++
> 1 file changed, 4 insertions(+)
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] dt-bindings: phy: ti: phy-gmii-sel: Add support for J784S4 CPSW9G
2023-03-19 12:45 ` Krzysztof Kozlowski
@ 2023-04-04 7:09 ` Siddharth Vadapalli
0 siblings, 0 replies; 4+ messages in thread
From: Siddharth Vadapalli @ 2023-04-04 7:09 UTC (permalink / raw)
To: vkoul, kishon
Cc: Krzysztof Kozlowski, krzysztof.kozlowski+dt, robh+dt, linux-phy,
devicetree, linux-kernel, linux-arm-kernel, srk, s-vadapalli
Hello Vinod,
Can this patch please be merged in case of no concerns?
Regards,
Siddharth.
On 19/03/23 18:15, Krzysztof Kozlowski wrote:
> On 15/03/2023 10:24, Siddharth Vadapalli wrote:
>> The CPSW9G instance of CPSW Ethernet Switch on TI's J784S4 SoC supports
>> additional PHY modes like QSGMII. Add a compatible for it.
>>
>> Enable the use of "ti,qsgmii-main-ports" property for J784S4 CPSW9G.
>>
>> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
>> ---
>> Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml | 4 ++++
>> 1 file changed, 4 insertions(+)
>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>
> Best regards,
> Krzysztof
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] dt-bindings: phy: ti: phy-gmii-sel: Add support for J784S4 CPSW9G
2023-03-15 9:24 [PATCH] dt-bindings: phy: ti: phy-gmii-sel: Add support for J784S4 CPSW9G Siddharth Vadapalli
2023-03-19 12:45 ` Krzysztof Kozlowski
@ 2023-04-12 16:38 ` Vinod Koul
1 sibling, 0 replies; 4+ messages in thread
From: Vinod Koul @ 2023-04-12 16:38 UTC (permalink / raw)
To: Siddharth Vadapalli
Cc: kishon, robh+dt, krzysztof.kozlowski, krzysztof.kozlowski+dt,
linux-phy, devicetree, linux-kernel, linux-arm-kernel, srk
On 15-03-23, 14:54, Siddharth Vadapalli wrote:
> The CPSW9G instance of CPSW Ethernet Switch on TI's J784S4 SoC supports
> additional PHY modes like QSGMII. Add a compatible for it.
>
> Enable the use of "ti,qsgmii-main-ports" property for J784S4 CPSW9G.
Applied, thanks
--
~Vinod
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2023-04-12 16:38 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-03-15 9:24 [PATCH] dt-bindings: phy: ti: phy-gmii-sel: Add support for J784S4 CPSW9G Siddharth Vadapalli
2023-03-19 12:45 ` Krzysztof Kozlowski
2023-04-04 7:09 ` Siddharth Vadapalli
2023-04-12 16:38 ` Vinod Koul
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).