[PATCH v2 1/3] dt-bindings: gpu: img,powervr-rogue: Document GX6250 GPU in Renesas R-Car M3-W/M3-W+

[PATCH v2 1/3] dt-bindings: gpu: img,powervr-rogue: Document GX6250 GPU in Renesas R-Car M3-W/M3-W+

[Marek Vasut]

Document Imagination Technologies PowerVR Rogue GX6250 BNVC 4.45.2.58
present in Renesas R-Car R8A77960 M3-W and R8A77961 M3-W+ SoC.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
---
Cc: Adam Ford <aford173@gmail.com>
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: David Airlie <airlied@gmail.com>
Cc: Frank Binns <frank.binns@imgtec.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Matt Coster <matt.coster@imgtec.com>
Cc: Maxime Ripard <mripard@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Simona Vetter <simona@ffwll.ch>
Cc: Thomas Zimmermann <tzimmermann@suse.de>
Cc: devicetree@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Cc: linux-renesas-soc@vger.kernel.org
---
See https://gitlab.freedesktop.org/imagination/linux-firmware/-/issues/13
for related userspace bits.
---
V2: - Add RB from Conor
    - Fill in allOf section for Renesas GPU, set fixed clock/clock-names
      maxItems count to 3 and power-domains/power-domain-names count to 2.
    - Use renesas,r8a7796-gpu for R8A77960 compatible string
---
 .../bindings/gpu/img,powervr-rogue.yaml       | 29 +++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
index c87d7bece0ecd..05fe9498dfa09 100644
--- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
+++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
@@ -13,6 +13,12 @@ maintainers:
 properties:
   compatible:
     oneOf:
+      - items:
+          - enum:
+              - renesas,r8a7796-gpu
+              - renesas,r8a77961-gpu
+          - const: img,img-gx6250
+          - const: img,img-rogue
       - items:
           - enum:
               - ti,am62-gpu
@@ -146,6 +152,29 @@ allOf:
         clocks:
           maxItems: 1
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - renesas,r8a7796-gpu
+              - renesas,r8a77961-gpu
+    then:
+      properties:
+        clocks:
+          minItems: 3
+        clock-names:
+          minItems: 3
+        power-domains:
+          items:
+            - description: Power domain A
+            - description: Power domain B
+        power-domain-names:
+          minItems: 2
+      required:
+        - power-domains
+        - power-domain-names
+
 examples:
   - |
     #include <dt-bindings/interrupt-controller/irq.h>
-- 
2.51.0

[PATCH v2 2/3] arm64: dts: renesas: r8a77960: Add GX6250 GPU node

[Marek Vasut]

Describe Imagination Technologies PowerVR Rogue GX6250 BNVC 4.45.2.58
present in Renesas R-Car R8A77960 M3-W SoC.

Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
---
Cc: Adam Ford <aford173@gmail.com>
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: David Airlie <airlied@gmail.com>
Cc: Frank Binns <frank.binns@imgtec.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Matt Coster <matt.coster@imgtec.com>
Cc: Maxime Ripard <mripard@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Simona Vetter <simona@ffwll.ch>
Cc: Thomas Zimmermann <tzimmermann@suse.de>
Cc: devicetree@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Cc: linux-renesas-soc@vger.kernel.org
---
V2: - Add RB from Niklas
    - Fill in all three clock and two power domains
    - Use renesas,r8a7796-gpu for R8A77960 compatible string
---
 arch/arm64/boot/dts/renesas/r8a77960.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
index 5b7e79b413394..0f7e63fdd075d 100644
--- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
@@ -2575,6 +2575,22 @@ gic: interrupt-controller@f1010000 {
 			resets = <&cpg 408>;
 		};
 
+		gpu: gpu@fd000000 {
+			compatible = "renesas,r8a7796-gpu",
+				     "img,img-gx6250",
+				     "img,img-rogue";
+			reg = <0 0xfd000000 0 0x40000>;
+			interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_CORE R8A7796_CLK_ZG>,
+				 <&cpg CPG_CORE R8A7796_CLK_S2D1>,
+				 <&cpg CPG_MOD 112>;
+			clock-names = "core", "mem", "sys";
+			power-domains = <&sysc R8A7796_PD_3DG_A>,
+					<&sysc R8A7796_PD_3DG_B>;
+			power-domain-names = "a", "b";
+			resets = <&cpg 112>;
+		};
+
 		pciec0: pcie@fe000000 {
 			compatible = "renesas,pcie-r8a7796",
 				     "renesas,pcie-rcar-gen3";
-- 
2.51.0

Re: [PATCH v2 2/3] arm64: dts: renesas: r8a77960: Add GX6250 GPU node

[Matt Coster]

[-- Attachment #1.1: Type: text/plain, Size: 2527 bytes --]

On 15/10/2025 16:38, Marek Vasut wrote:
> Describe Imagination Technologies PowerVR Rogue GX6250 BNVC 4.45.2.58
> present in Renesas R-Car R8A77960 M3-W SoC.
> 
> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>

Still not convinced I should be R-b'ing dts changes, so:

Acked-by: Matt Coster <matt.coster@imgtec.com>

Cheers,
Matt

> ---
> Cc: Adam Ford <aford173@gmail.com>
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: David Airlie <airlied@gmail.com>
> Cc: Frank Binns <frank.binns@imgtec.com>
> Cc: Geert Uytterhoeven <geert+renesas@glider.be>
> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
> Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Cc: Magnus Damm <magnus.damm@gmail.com>
> Cc: Matt Coster <matt.coster@imgtec.com>
> Cc: Maxime Ripard <mripard@kernel.org>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Simona Vetter <simona@ffwll.ch>
> Cc: Thomas Zimmermann <tzimmermann@suse.de>
> Cc: devicetree@vger.kernel.org
> Cc: dri-devel@lists.freedesktop.org
> Cc: linux-renesas-soc@vger.kernel.org
> ---
> V2: - Add RB from Niklas
>     - Fill in all three clock and two power domains
>     - Use renesas,r8a7796-gpu for R8A77960 compatible string
> ---
>  arch/arm64/boot/dts/renesas/r8a77960.dtsi | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
> index 5b7e79b413394..0f7e63fdd075d 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
> @@ -2575,6 +2575,22 @@ gic: interrupt-controller@f1010000 {
>  			resets = <&cpg 408>;
>  		};
>  
> +		gpu: gpu@fd000000 {
> +			compatible = "renesas,r8a7796-gpu",
> +				     "img,img-gx6250",
> +				     "img,img-rogue";
> +			reg = <0 0xfd000000 0 0x40000>;
> +			interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cpg CPG_CORE R8A7796_CLK_ZG>,
> +				 <&cpg CPG_CORE R8A7796_CLK_S2D1>,
> +				 <&cpg CPG_MOD 112>;
> +			clock-names = "core", "mem", "sys";
> +			power-domains = <&sysc R8A7796_PD_3DG_A>,
> +					<&sysc R8A7796_PD_3DG_B>;
> +			power-domain-names = "a", "b";
> +			resets = <&cpg 112>;
> +		};
> +
>  		pciec0: pcie@fe000000 {
>  			compatible = "renesas,pcie-r8a7796",
>  				     "renesas,pcie-rcar-gen3";


-- 
Matt Coster
E: matt.coster@imgtec.com

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Re: [PATCH v2 2/3] arm64: dts: renesas: r8a77960: Add GX6250 GPU node

[Geert Uytterhoeven]

Hi Marek,

On Wed, 15 Oct 2025 at 17:40, Marek Vasut
<marek.vasut+renesas@mailbox.org> wrote:
> Describe Imagination Technologies PowerVR Rogue GX6250 BNVC 4.45.2.58
> present in Renesas R-Car R8A77960 M3-W SoC.
>
> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>

> V2: - Add RB from Niklas
>     - Fill in all three clock and two power domains
>     - Use renesas,r8a7796-gpu for R8A77960 compatible string

Thanks for the update!

> --- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
> @@ -2575,6 +2575,22 @@ gic: interrupt-controller@f1010000 {
>                         resets = <&cpg 408>;
>                 };
>
> +               gpu: gpu@fd000000 {
> +                       compatible = "renesas,r8a7796-gpu",
> +                                    "img,img-gx6250",
> +                                    "img,img-rogue";
> +                       reg = <0 0xfd000000 0 0x40000>;
> +                       interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&cpg CPG_CORE R8A7796_CLK_ZG>,
> +                                <&cpg CPG_CORE R8A7796_CLK_S2D1>,
> +                                <&cpg CPG_MOD 112>;
> +                       clock-names = "core", "mem", "sys";
> +                       power-domains = <&sysc R8A7796_PD_3DG_A>,
> +                                       <&sysc R8A7796_PD_3DG_B>;
> +                       power-domain-names = "a", "b";
> +                       resets = <&cpg 112>;

status = "disabled"; ?

> +               };
> +
>                 pciec0: pcie@fe000000 {
>                         compatible = "renesas,pcie-r8a7796",
>                                      "renesas,pcie-rcar-gen3";

The rest LGTM, so
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2 2/3] arm64: dts: renesas: r8a77960: Add GX6250 GPU node

[Marek Vasut]

On 10/16/25 10:22 AM, Geert Uytterhoeven wrote:

Hello Geert,

>> --- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi
>> +++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
>> @@ -2575,6 +2575,22 @@ gic: interrupt-controller@f1010000 {
>>                          resets = <&cpg 408>;
>>                  };
>>
>> +               gpu: gpu@fd000000 {
>> +                       compatible = "renesas,r8a7796-gpu",
>> +                                    "img,img-gx6250",
>> +                                    "img,img-rogue";
>> +                       reg = <0 0xfd000000 0 0x40000>;
>> +                       interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
>> +                       clocks = <&cpg CPG_CORE R8A7796_CLK_ZG>,
>> +                                <&cpg CPG_CORE R8A7796_CLK_S2D1>,
>> +                                <&cpg CPG_MOD 112>;
>> +                       clock-names = "core", "mem", "sys";
>> +                       power-domains = <&sysc R8A7796_PD_3DG_A>,
>> +                                       <&sysc R8A7796_PD_3DG_B>;
>> +                       power-domain-names = "a", "b";
>> +                       resets = <&cpg 112>;
> 
> status = "disabled"; ?

The GPU is always present in the SoC, similar to IPMMU/GIC/DMA/VSP/... 
which are also never disabled, do we want to disable the GPU by default 
and enable per-board ?

I would argue the GPU should be enabled by default, so the GPU driver 
can do a proper power management of the GPU. If firmware is missing, at 
least power it off on failed probe, if nothing else.

[...]

Re: [PATCH v2 2/3] arm64: dts: renesas: r8a77960: Add GX6250 GPU node

[Geert Uytterhoeven]

Hi Marek,

On Thu, 16 Oct 2025 at 11:48, Marek Vasut <marek.vasut@mailbox.org> wrote:
> On 10/16/25 10:22 AM, Geert Uytterhoeven wrote:
> >> --- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi
> >> +++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
> >> @@ -2575,6 +2575,22 @@ gic: interrupt-controller@f1010000 {
> >>                          resets = <&cpg 408>;
> >>                  };
> >>
> >> +               gpu: gpu@fd000000 {
> >> +                       compatible = "renesas,r8a7796-gpu",
> >> +                                    "img,img-gx6250",
> >> +                                    "img,img-rogue";
> >> +                       reg = <0 0xfd000000 0 0x40000>;
> >> +                       interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
> >> +                       clocks = <&cpg CPG_CORE R8A7796_CLK_ZG>,
> >> +                                <&cpg CPG_CORE R8A7796_CLK_S2D1>,
> >> +                                <&cpg CPG_MOD 112>;
> >> +                       clock-names = "core", "mem", "sys";
> >> +                       power-domains = <&sysc R8A7796_PD_3DG_A>,
> >> +                                       <&sysc R8A7796_PD_3DG_B>;
> >> +                       power-domain-names = "a", "b";
> >> +                       resets = <&cpg 112>;
> >
> > status = "disabled"; ?
>
> The GPU is always present in the SoC, similar to IPMMU/GIC/DMA/VSP/...

These are special, as they are linked from other devices.
And everything needs the GIC.

> which are also never disabled, do we want to disable the GPU by default
> and enable per-board ?

Yes please. We do the same with renesas,*-mali GPU nodes.
The board may not even have graphical output.
Or do you envision using the GPU for more general and headless operation?

> I would argue the GPU should be enabled by default, so the GPU driver
> can do a proper power management of the GPU. If firmware is missing, at
> least power it off on failed probe, if nothing else.

The *_PD_3DG_* domains are powered down anyway when unused.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2 2/3] arm64: dts: renesas: r8a77960: Add GX6250 GPU node

[Marek Vasut]

On 10/16/25 12:14 PM, Geert Uytterhoeven wrote:

Hello Geert,

>> which are also never disabled, do we want to disable the GPU by default
>> and enable per-board ?
> 
> Yes please. We do the same with renesas,*-mali GPU nodes.
> The board may not even have graphical output.
> Or do you envision using the GPU for more general and headless operation?

The GPU does have GP-GPU compute shader, so even headless system can do 
compute on the GPU.

>> I would argue the GPU should be enabled by default, so the GPU driver
>> can do a proper power management of the GPU. If firmware is missing, at
>> least power it off on failed probe, if nothing else.
> 
> The *_PD_3DG_* domains are powered down anyway when unused.

If the driver was bound to the GPU node, then the domain would be surely 
powered down in control of the Linux kernel driver, without depending on 
the prior stage to leave it powered down.

I think it is in fact better to bind the GPU driver to the GPU IP and 
let the GPU driver power manage the GPU in a well defined manner, 
instead of depending on the prior stage to leave the GPU in some 
specific state ?

-- 
Best regards,
Marek Vasut

Re: [PATCH v2 2/3] arm64: dts: renesas: r8a77960: Add GX6250 GPU node

[Geert Uytterhoeven]

Hi Marek,

On Thu, 16 Oct 2025 at 16:13, Marek Vasut <marek.vasut@mailbox.org> wrote:
> On 10/16/25 12:14 PM, Geert Uytterhoeven wrote:
> >> which are also never disabled, do we want to disable the GPU by default
> >> and enable per-board ?
> >
> > Yes please. We do the same with renesas,*-mali GPU nodes.
> > The board may not even have graphical output.
> > Or do you envision using the GPU for more general and headless operation?
>
> The GPU does have GP-GPU compute shader, so even headless system can do
> compute on the GPU.

How is this handled on other SoCs?

> >> I would argue the GPU should be enabled by default, so the GPU driver
> >> can do a proper power management of the GPU. If firmware is missing, at
> >> least power it off on failed probe, if nothing else.
> >
> > The *_PD_3DG_* domains are powered down anyway when unused.
>
> If the driver was bound to the GPU node, then the domain would be surely
> powered down in control of the Linux kernel driver, without depending on
> the prior stage to leave it powered down.
>
> I think it is in fact better to bind the GPU driver to the GPU IP and
> let the GPU driver power manage the GPU in a well defined manner,
> instead of depending on the prior stage to leave the GPU in some
> specific state ?

The domains are powered down by the rcar-sysc PM Domain driver,
hence the system does not rely on any prior stage taking care of that.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2 2/3] arm64: dts: renesas: r8a77960: Add GX6250 GPU node

[Marek Vasut]

On 10/16/25 4:32 PM, Geert Uytterhoeven wrote:

Hello Geert,

> On Thu, 16 Oct 2025 at 16:13, Marek Vasut <marek.vasut@mailbox.org> wrote:
>> On 10/16/25 12:14 PM, Geert Uytterhoeven wrote:
>>>> which are also never disabled, do we want to disable the GPU by default
>>>> and enable per-board ?
>>>
>>> Yes please. We do the same with renesas,*-mali GPU nodes.
>>> The board may not even have graphical output.
>>> Or do you envision using the GPU for more general and headless operation?
>>
>> The GPU does have GP-GPU compute shader, so even headless system can do
>> compute on the GPU.
> 
> How is this handled on other SoCs?

I did a quick measurement to get some statistics from next-20251016 :

$ sed -n '/gpu@.*{/,/}/ { /compatible/ s@.*compatible =.*@compatible@p ; 
/status / s@^[ \t]\+@@p }' $( git grep -l 'gpu@' arch ) | sort | uniq -c
     152 compatible
      66 status = "disabled";
       8 status = "okay";

It seems there are 152 GPU nodes, 66 are explicitly disabled, the rest 
are enabled, so about 3/5 of the GPU nodes are default enabled. But my 
measurement is crude.

>>>> I would argue the GPU should be enabled by default, so the GPU driver
>>>> can do a proper power management of the GPU. If firmware is missing, at
>>>> least power it off on failed probe, if nothing else.
>>>
>>> The *_PD_3DG_* domains are powered down anyway when unused.
>>
>> If the driver was bound to the GPU node, then the domain would be surely
>> powered down in control of the Linux kernel driver, without depending on
>> the prior stage to leave it powered down.
>>
>> I think it is in fact better to bind the GPU driver to the GPU IP and
>> let the GPU driver power manage the GPU in a well defined manner,
>> instead of depending on the prior stage to leave the GPU in some
>> specific state ?
> 
> The domains are powered down by the rcar-sysc PM Domain driver,
> hence the system does not rely on any prior stage taking care of that.

OK

-- 
Best regards,
Marek Vasut

[PATCH v2 3/3] arm64: dts: renesas: r8a77961: Add GX6250 GPU node

[Marek Vasut]

Describe Imagination Technologies PowerVR Rogue GX6250 BNVC 4.45.2.58
present in Renesas R-Car R8A77961 M3-W+ SoC.

Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
---
Cc: Adam Ford <aford173@gmail.com>
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: David Airlie <airlied@gmail.com>
Cc: Frank Binns <frank.binns@imgtec.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Matt Coster <matt.coster@imgtec.com>
Cc: Maxime Ripard <mripard@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Simona Vetter <simona@ffwll.ch>
Cc: Thomas Zimmermann <tzimmermann@suse.de>
Cc: devicetree@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Cc: linux-renesas-soc@vger.kernel.org
---
V2: - Add RB from Niklas
    - Fix up power-domains = <&sysc R8A77961_PD_3DG_B>; for 77961
    - Fill in all three clock and two power domains
---
 arch/arm64/boot/dts/renesas/r8a77961.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
index 12435ad9adc04..aa7f5de61e787 100644
--- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
@@ -2455,6 +2455,22 @@ gic: interrupt-controller@f1010000 {
 			resets = <&cpg 408>;
 		};
 
+		gpu: gpu@fd000000 {
+			compatible = "renesas,r8a77961-gpu",
+				     "img,img-gx6250",
+				     "img,img-rogue";
+			reg = <0 0xfd000000 0 0x40000>;
+			interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_CORE R8A77961_CLK_ZG>,
+				 <&cpg CPG_CORE R8A77961_CLK_S2D1>,
+				 <&cpg CPG_MOD 112>;
+			clock-names = "core", "mem", "sys";
+			power-domains = <&sysc R8A77961_PD_3DG_A>,
+					<&sysc R8A77961_PD_3DG_B>;
+			power-domain-names = "a", "b";
+			resets = <&cpg 112>;
+		};
+
 		pciec0: pcie@fe000000 {
 			compatible = "renesas,pcie-r8a77961",
 				     "renesas,pcie-rcar-gen3";
-- 
2.51.0

Re: [PATCH v2 3/3] arm64: dts: renesas: r8a77961: Add GX6250 GPU node

[Matt Coster]

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On 15/10/2025 16:38, Marek Vasut wrote:
> Describe Imagination Technologies PowerVR Rogue GX6250 BNVC 4.45.2.58
> present in Renesas R-Car R8A77961 M3-W+ SoC.
> 
> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>

Same as P2/3:

Acked-by: Matt Coster <matt.coster@imgtec.com>

Cheers,
Matt

> ---
> Cc: Adam Ford <aford173@gmail.com>
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: David Airlie <airlied@gmail.com>
> Cc: Frank Binns <frank.binns@imgtec.com>
> Cc: Geert Uytterhoeven <geert+renesas@glider.be>
> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
> Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Cc: Magnus Damm <magnus.damm@gmail.com>
> Cc: Matt Coster <matt.coster@imgtec.com>
> Cc: Maxime Ripard <mripard@kernel.org>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Simona Vetter <simona@ffwll.ch>
> Cc: Thomas Zimmermann <tzimmermann@suse.de>
> Cc: devicetree@vger.kernel.org
> Cc: dri-devel@lists.freedesktop.org
> Cc: linux-renesas-soc@vger.kernel.org
> ---
> V2: - Add RB from Niklas
>     - Fix up power-domains = <&sysc R8A77961_PD_3DG_B>; for 77961
>     - Fill in all three clock and two power domains
> ---
>  arch/arm64/boot/dts/renesas/r8a77961.dtsi | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
> index 12435ad9adc04..aa7f5de61e787 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
> @@ -2455,6 +2455,22 @@ gic: interrupt-controller@f1010000 {
>  			resets = <&cpg 408>;
>  		};
>  
> +		gpu: gpu@fd000000 {
> +			compatible = "renesas,r8a77961-gpu",
> +				     "img,img-gx6250",
> +				     "img,img-rogue";
> +			reg = <0 0xfd000000 0 0x40000>;
> +			interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cpg CPG_CORE R8A77961_CLK_ZG>,
> +				 <&cpg CPG_CORE R8A77961_CLK_S2D1>,
> +				 <&cpg CPG_MOD 112>;
> +			clock-names = "core", "mem", "sys";
> +			power-domains = <&sysc R8A77961_PD_3DG_A>,
> +					<&sysc R8A77961_PD_3DG_B>;
> +			power-domain-names = "a", "b";
> +			resets = <&cpg 112>;
> +		};
> +
>  		pciec0: pcie@fe000000 {
>  			compatible = "renesas,pcie-r8a77961",
>  				     "renesas,pcie-rcar-gen3";


-- 
Matt Coster
E: matt.coster@imgtec.com

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Re: [PATCH v2 3/3] arm64: dts: renesas: r8a77961: Add GX6250 GPU node

[Geert Uytterhoeven]

Hi Marek,

On Wed, 15 Oct 2025 at 17:40, Marek Vasut
<marek.vasut+renesas@mailbox.org> wrote:
> Describe Imagination Technologies PowerVR Rogue GX6250 BNVC 4.45.2.58
> present in Renesas R-Car R8A77961 M3-W+ SoC.
>
> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>

> V2: - Add RB from Niklas
>     - Fix up power-domains = <&sysc R8A77961_PD_3DG_B>; for 77961
>     - Fill in all three clock and two power domains

Thanks for the update!

> --- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
> @@ -2455,6 +2455,22 @@ gic: interrupt-controller@f1010000 {
>                         resets = <&cpg 408>;
>                 };
>
> +               gpu: gpu@fd000000 {
> +                       compatible = "renesas,r8a77961-gpu",
> +                                    "img,img-gx6250",
> +                                    "img,img-rogue";
> +                       reg = <0 0xfd000000 0 0x40000>;
> +                       interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&cpg CPG_CORE R8A77961_CLK_ZG>,
> +                                <&cpg CPG_CORE R8A77961_CLK_S2D1>,
> +                                <&cpg CPG_MOD 112>;
> +                       clock-names = "core", "mem", "sys";
> +                       power-domains = <&sysc R8A77961_PD_3DG_A>,
> +                                       <&sysc R8A77961_PD_3DG_B>;
> +                       power-domain-names = "a", "b";
> +                       resets = <&cpg 112>;

status = "disabled"; ?

> +               };
> +
>                 pciec0: pcie@fe000000 {
>                         compatible = "renesas,pcie-r8a77961",
>                                      "renesas,pcie-rcar-gen3";

The rest LGTM, so
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2 1/3] dt-bindings: gpu: img,powervr-rogue: Document GX6250 GPU in Renesas R-Car M3-W/M3-W+

[Matt Coster]

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On 15/10/2025 16:38, Marek Vasut wrote:
> Document Imagination Technologies PowerVR Rogue GX6250 BNVC 4.45.2.58
> present in Renesas R-Car R8A77960 M3-W and R8A77961 M3-W+ SoC.
> 
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
> ---
> Cc: Adam Ford <aford173@gmail.com>
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: David Airlie <airlied@gmail.com>
> Cc: Frank Binns <frank.binns@imgtec.com>
> Cc: Geert Uytterhoeven <geert+renesas@glider.be>
> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
> Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Cc: Magnus Damm <magnus.damm@gmail.com>
> Cc: Matt Coster <matt.coster@imgtec.com>
> Cc: Maxime Ripard <mripard@kernel.org>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Simona Vetter <simona@ffwll.ch>
> Cc: Thomas Zimmermann <tzimmermann@suse.de>
> Cc: devicetree@vger.kernel.org
> Cc: dri-devel@lists.freedesktop.org
> Cc: linux-renesas-soc@vger.kernel.org
> ---
> See https://gitlab.freedesktop.org/imagination/linux-firmware/-/issues/13
> for related userspace bits.
> ---
> V2: - Add RB from Conor
>     - Fill in allOf section for Renesas GPU, set fixed clock/clock-names
>       maxItems count to 3 and power-domains/power-domain-names count to 2.
>     - Use renesas,r8a7796-gpu for R8A77960 compatible string
> ---
>  .../bindings/gpu/img,powervr-rogue.yaml       | 29 +++++++++++++++++++
>  1 file changed, 29 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> index c87d7bece0ecd..05fe9498dfa09 100644
> --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> @@ -13,6 +13,12 @@ maintainers:
>  properties:
>    compatible:
>      oneOf:
> +      - items:
> +          - enum:
> +              - renesas,r8a7796-gpu
> +              - renesas,r8a77961-gpu
> +          - const: img,img-gx6250
> +          - const: img,img-rogue
>        - items:
>            - enum:
>                - ti,am62-gpu
> @@ -146,6 +152,29 @@ allOf:
>          clocks:
>            maxItems: 1
>  
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - renesas,r8a7796-gpu
> +              - renesas,r8a77961-gpu
> +    then:
> +      properties:
> +        clocks:
> +          minItems: 3
> +        clock-names:
> +          minItems: 3
> +        power-domains:
> +          items:
> +            - description: Power domain A
> +            - description: Power domain B
> +        power-domain-names:
> +          minItems: 2
> +      required:
> +        - power-domains
> +        - power-domain-names
> +

Hi Marek,

Thanks for the updated patches!

Would you mind splitting this conditional block up? We already have a
constraint for 2 power-domains (see img,img-bxs-4-64), which should be
applied to the entire img,img-gx6250 compatible.

As for the clocks, for the currently supported GPUs, we have "mem" and
"sys" clocks that are optional at integration time, so those
conditionals are based on the vendor compatible strings (ti,... etc).
However, these older GPUs always require all three clocks, so it
probably makes sense to create the properties:clock{,-name}s:minItems:3
constraint on the img,img-gx6250 compatible as well, rather than the
renesas,r8... ones.

You shouldn't need to explicit list the power-domain descriptions at the
constraint level at all; if there's a build warning that they're missing
I guess the correct place to add them would be on the top-level
power-domains entry, but I don't really think they contribute anything
meaningful.

Cheers,
Matt

>  examples:
>    - |
>      #include <dt-bindings/interrupt-controller/irq.h>

-- 
Matt Coster
E: matt.coster@imgtec.com

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Re: [PATCH v2 1/3] dt-bindings: gpu: img,powervr-rogue: Document GX6250 GPU in Renesas R-Car M3-W/M3-W+

[Marek Vasut]

On 10/15/25 6:50 PM, Matt Coster wrote:

Hello Matt,

> Would you mind splitting this conditional block up? We already have a
> constraint for 2 power-domains (see img,img-bxs-4-64), which should be
> applied to the entire img,img-gx6250 compatible.

I will add a patch into V3 which splits the allOf section up such, that 
clocks and power-domains limits are limited separately. That will make 
this addition of GX6250 easy.

> As for the clocks, for the currently supported GPUs, we have "mem" and
> "sys" clocks that are optional at integration time, so those
> conditionals are based on the vendor compatible strings (ti,... etc).
> However, these older GPUs always require all three clocks, so it
> probably makes sense to create the properties:clock{,-name}s:minItems:3
> constraint on the img,img-gx6250 compatible as well, rather than the
> renesas,r8... ones.

OK

> You shouldn't need to explicit list the power-domain descriptions at the
> constraint level at all; if there's a build warning that they're missing
> I guess the correct place to add them would be on the top-level
> power-domains entry, but I don't really think they contribute anything
> meaningful.
The descriptions basically emulate minItems/maxItems: 2 here. I can also 
just set minItems:2 ?

I have one more question -- does GX6250 _always_ have two power domains, 
i.e. the constrains always set minItems:2 for "img,img-gx6250" 
"power-domains" property ?

Re: [PATCH v2 1/3] dt-bindings: gpu: img,powervr-rogue: Document GX6250 GPU in Renesas R-Car M3-W/M3-W+

[Matt Coster]

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Hi Marek,

On 15/10/2025 19:38, Marek Vasut wrote:
> On 10/15/25 6:50 PM, Matt Coster wrote:
> 
> Hello Matt,
> 
>> Would you mind splitting this conditional block up? We already have a
>> constraint for 2 power-domains (see img,img-bxs-4-64), which should be
>> applied to the entire img,img-gx6250 compatible.
> 
> I will add a patch into V3 which splits the allOf section up such,
> that clocks and power-domains limits are limited separately. That will
> make this addition of GX6250 easy.
> 
>> As for the clocks, for the currently supported GPUs, we have "mem" and
>> "sys" clocks that are optional at integration time, so those
>> conditionals are based on the vendor compatible strings (ti,... etc).
>> However, these older GPUs always require all three clocks, so it
>> probably makes sense to create the properties:clock{,-name}s:minItems:3
>> constraint on the img,img-gx6250 compatible as well, rather than the
>> renesas,r8... ones.
> 
> OK
> 
>> You shouldn't need to explicit list the power-domain descriptions at the
>> constraint level at all; if there's a build warning that they're missing
>> I guess the correct place to add them would be on the top-level
>> power-domains entry, but I don't really think they contribute anything
>> meaningful.
> The descriptions basically emulate minItems/maxItems: 2 here. I can
> also just set minItems:2 ?

I think that's probably much cleaner! We can add maxItems:2 back in
later if/when we add additional power domains at the top level.

> 
> I have one more question -- does GX6250 _always_ have two power
> domains, i.e. the constrains always set minItems:2 for
> "img,img-gx6250" "power-domains" property ?

Yes, that's correct. All PowerVR GPUs have the number of power domains
defined in the IP. Even where the SoC does not expose control of these
to the OS, the GPU still communicates with the SoC power controller
directly to gate them on and off during normal operation.

Cheers,
Matt

-- 
Matt Coster
E: matt.coster@imgtec.com

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Re: [PATCH v2 1/3] dt-bindings: gpu: img,powervr-rogue: Document GX6250 GPU in Renesas R-Car M3-W/M3-W+

[Marek Vasut]

On 10/16/25 10:48 AM, Matt Coster wrote:

Hello Matt,

>>> Would you mind splitting this conditional block up? We already have a
>>> constraint for 2 power-domains (see img,img-bxs-4-64), which should be
>>> applied to the entire img,img-gx6250 compatible.
>>
>> I will add a patch into V3 which splits the allOf section up such,
>> that clocks and power-domains limits are limited separately. That will
>> make this addition of GX6250 easy.
>>
>>> As for the clocks, for the currently supported GPUs, we have "mem" and
>>> "sys" clocks that are optional at integration time, so those
>>> conditionals are based on the vendor compatible strings (ti,... etc).
>>> However, these older GPUs always require all three clocks, so it
>>> probably makes sense to create the properties:clock{,-name}s:minItems:3
>>> constraint on the img,img-gx6250 compatible as well, rather than the
>>> renesas,r8... ones.
>>
>> OK
>>
>>> You shouldn't need to explicit list the power-domain descriptions at the
>>> constraint level at all; if there's a build warning that they're missing
>>> I guess the correct place to add them would be on the top-level
>>> power-domains entry, but I don't really think they contribute anything
>>> meaningful.
>> The descriptions basically emulate minItems/maxItems: 2 here. I can
>> also just set minItems:2 ?
> 
> I think that's probably much cleaner! We can add maxItems:2 back in
> later if/when we add additional power domains at the top level.

OK, will do.

>> I have one more question -- does GX6250 _always_ have two power
>> domains, i.e. the constrains always set minItems:2 for
>> "img,img-gx6250" "power-domains" property ?
> 
> Yes, that's correct. All PowerVR GPUs have the number of power domains
> defined in the IP. Even where the SoC does not expose control of these
> to the OS, the GPU still communicates with the SoC power controller
> directly to gate them on and off during normal operation.
Understood, thank you for the clarification.

Re: [PATCH v2 1/3] dt-bindings: gpu: img,powervr-rogue: Document GX6250 GPU in Renesas R-Car M3-W/M3-W+

[Geert Uytterhoeven]

Hi Marek,

On Wed, 15 Oct 2025 at 17:40, Marek Vasut
<marek.vasut+renesas@mailbox.org> wrote:
> Document Imagination Technologies PowerVR Rogue GX6250 BNVC 4.45.2.58
> present in Renesas R-Car R8A77960 M3-W and R8A77961 M3-W+ SoC.
>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>

Thanks for the update!

> --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> @@ -13,6 +13,12 @@ maintainers:
>  properties:
>    compatible:
>      oneOf:
> +      - items:
> +          - enum:
> +              - renesas,r8a7796-gpu
> +              - renesas,r8a77961-gpu

OK.

> +          - const: img,img-gx6250
> +          - const: img,img-rogue
>        - items:
>            - enum:
>                - ti,am62-gpu
> @@ -146,6 +152,29 @@ allOf:
>          clocks:
>            maxItems: 1
>
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - renesas,r8a7796-gpu
> +              - renesas,r8a77961-gpu
> +    then:
> +      properties:
> +        clocks:
> +          minItems: 3
> +        clock-names:
> +          minItems: 3
> +        power-domains:
> +          items:
> +            - description: Power domain A
> +            - description: Power domain B
> +        power-domain-names:
> +          minItems: 2

I think:

    clocks:
        minItems: 3
    power-domains:
        minItems: 2

plus the required below should be sufficient.

As Matt said, the power-domain-names are already specified at the top level.

I guess they should be dropped from the other device-specific
constraints, and their descriptions moved to the top, too (in a separate patch).

> +      required:
> +        - power-domains
> +        - power-domain-names
> +
>  examples:
>    - |
>      #include <dt-bindings/interrupt-controller/irq.h>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds