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From: Stephen Boyd <sboyd@kernel.org>
To: Marek Vasut <marek.vasut+renesas@mailbox.org>, linux-clk@vger.kernel.org
Cc: Marek Vasut <marek.vasut+renesas@mailbox.org>,
	Alexander Stein <alexander.stein@ew.tq-group.com>,
	Conor Dooley <conor+dt@kernel.org>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH] clk: rs9: Fix DIF OEn bit placement on 9FGV0241
Date: Sun, 17 Dec 2023 14:10:25 -0800	[thread overview]
Message-ID: <92d5fa61ef21a90e99127a3180b504ea.sboyd@kernel.org> (raw)
In-Reply-To: <20231105200642.62792-1-marek.vasut+renesas@mailbox.org>

Quoting Marek Vasut (2023-11-05 12:06:15)
> On 9FGV0241, the DIF OE0 is BIT(1) and DIF OE1 is BIT(2), on the other
> chips like 9FGV0441 and 9FGV0841 DIF OE0 is BIT(0) and so on. Increment
> the index in BIT() macro instead of the result of BIT() macro to shift
> the bit correctly on 9FGV0241.
> 
> Fixes: 603df193ec51 ("clk: rs9: Support device specific dif bit calculation")
> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
> ---

Applied to clk-next

      parent reply	other threads:[~2023-12-17 22:10 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-05 20:06 [PATCH] clk: rs9: Fix DIF OEn bit placement on 9FGV0241 Marek Vasut
2023-11-06 10:09 ` Alexander Stein
2023-12-17 22:10 ` Stephen Boyd [this message]

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