From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Samuel Holland <samuel@sholland.org>,
Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Rob Herring <robh+dt@kernel.org>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev
Subject: Re: [PATCH 1/2] dt-bindings: power: Add Allwinner D1 PPU
Date: Sat, 31 Dec 2022 19:58:39 +0100 [thread overview]
Message-ID: <92dbd096-b02f-b5e5-6275-a37a3d582685@linaro.org> (raw)
In-Reply-To: <20221231160402.16157-2-samuel@sholland.org>
On 31/12/2022 17:04, Samuel Holland wrote:
> The Allwinner D1 family of SoCs contain a "PPU" power domain controller
> separate from the PRCM. It can power down the video engine and DSP, and
> it contains special logic for hardware-assisted CPU idle. Other recent
> Allwinner SoCs (e.g. TV303) have a PPU with a different set of domains.
>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
>
> .../power/allwinner,sun20i-d1-ppu.yaml | 54 +++++++++++++++++++
> .../power/allwinner,sun20i-d1-ppu.h | 10 ++++
> 2 files changed, 64 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml
> create mode 100644 include/dt-bindings/power/allwinner,sun20i-d1-ppu.h
>
> diff --git a/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml b/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml
> new file mode 100644
> index 000000000000..64c9a9f398a2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml
> @@ -0,0 +1,54 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/power/allwinner,sun20i-d1-ppu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Allwinner SoCs "PPU" power domain controller
Drop quotes over "PPU" - it's not some nickname, alias, but acronym.
Explain the acronym in description.
> +
> +maintainers:
> + - Samuel Holland <samuel@sholland.org>
> +
> +description:
> + D1 and related SoCs contain a power domain controller for the CPUs, GPU, and
> + video-related hardware.
> +
> +properties:
> + compatible:
> + enum:
> + - allwinner,sun20i-d1-ppu
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + description: Bus Clock
> + maxItems: 1
> +
> + resets:
> + maxItems: 1
> +
> + '#power-domain-cells':
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - resets
> + - '#power-domain-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/sun20i-d1-r-ccu.h>
> + #include <dt-bindings/reset/sun20i-d1-r-ccu.h>
> +
> + ppu: power-controller@7001000 {
> + compatible = "allwinner,sun20i-d1-ppu";
Use 4 spaces for example indentation.
With above:
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-12-31 18:58 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-31 16:04 [PATCH 0/2] Allwinner power domain support Samuel Holland
2022-12-31 16:04 ` [PATCH 1/2] dt-bindings: power: Add Allwinner D1 PPU Samuel Holland
2022-12-31 18:58 ` Krzysztof Kozlowski [this message]
2022-12-31 19:12 ` Samuel Holland
2022-12-31 16:04 ` [PATCH 2/2] soc: sunxi: Add Allwinner D1 PPU driver Samuel Holland
2023-01-05 16:38 ` Jernej Škrabec
2023-01-05 16:34 ` [PATCH 0/2] Allwinner power domain support Jernej Škrabec
2023-01-26 6:23 ` Samuel Holland
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