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From: "Moudy Ho (何宗原)" <Moudy.Ho@mediatek.com>
To: "conor@kernel.org" <conor@kernel.org>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>,
	"Macpaul Lin (林智斌)" <Macpaul.Lin@mediatek.com>
Cc: "Pablo Sun (孫毓翔)" <pablo.sun@mediatek.com>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"Chris-qj Chen (陳奇進)" <Chris-qj.Chen@mediatek.com>,
	"Bear Wang (萩原惟德)" <bear.wang@mediatek.com>,
	"wenst@chromium.org" <wenst@chromium.org>,
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	"simona@ffwll.ch" <simona@ffwll.ch>,
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	Project_Global_Chrome_Upstream_Group
	<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: Re: [PATCH 3/6] dt-bindings: display: mediatek: Fix clocks count constraint for new SoCs
Date: Fri, 27 Sep 2024 02:27:14 +0000	[thread overview]
Message-ID: <93d9ffbe466ff61d5426b6f158a4b8464f56824d.camel@mediatek.com> (raw)
In-Reply-To: <7a1315ef-4be5-4528-858b-9f07c814636d@collabora.com>

On Thu, 2024-09-26 at 11:38 +0200, AngeloGioacchino Del Regno wrote:
> Il 25/09/24 16:34, Conor Dooley ha scritto:
> > On Wed, Sep 25, 2024 at 04:42:59PM +0800, Macpaul Lin wrote:
> > > 
> > > On 9/25/24 00:00, Conor Dooley wrote:
> > > > On Tue, Sep 24, 2024 at 01:42:01PM +0200, AngeloGioacchino Del
> > > > Regno wrote:
> > > > > Il 24/09/24 12:31, Macpaul Lin ha scritto:
> > > > > > The display node in mt8195.dtsi was triggering a CHECK_DTBS
> > > > > > error due
> > > > > > to an excessively long 'clocks' property:
> > > > > >      display@14f06000: clocks: [[31, 14], [31, 43], [31,
> > > > > > 44]] is too long
> > > > > > 
> > > > > > To resolve this issue, add "maxItems: 3" to the 'clocks'
> > > > > > property in
> > > > > > the DT schema.
> > > > > > 
> > > > > > Fixes: 4ed545e7d100 ("dt-bindings: display: mediatek: disp:
> > > > > > split each block to individual yaml")
> > > > > > Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
> > > > > > ---
> > > > > >     .../devicetree/bindings/display/mediatek/mediatek,split
> > > > > > .yaml     | 1 +
> > > > > >     1 file changed, 1 insertion(+)
> > > > > > 
> > > > > > diff --git
> > > > > > a/Documentation/devicetree/bindings/display/mediatek/mediat
> > > > > > ek,split.yaml
> > > > > > b/Documentation/devicetree/bindings/display/mediatek/mediat
> > > > > > ek,split.yaml
> > > > > > index e4affc854f3d..42d2d483cc29 100644
> > > > > > ---
> > > > > > a/Documentation/devicetree/bindings/display/mediatek/mediat
> > > > > > ek,split.yaml
> > > > > > +++
> > > > > > b/Documentation/devicetree/bindings/display/mediatek/mediat
> > > > > > ek,split.yaml
> > > > > > @@ -57,6 +57,7 @@ properties:
> > > > > >       clocks:
> > > > > >         items:
> > > > > >           - description: SPLIT Clock
> > > > > 
> > > > > That's at least confusing (granted that it works) - either
> > > > > add a description for
> > > > > each clock and then set `minItems: 1` (preferred), or remove
> > > > > this "SPLIT Clock"
> > > > > description and allow a maximum of 3 clocks.
> > > > > 
> > > > > Removing the description can be done - IMO - because "SPLIT
> > > > > Clock" is, well,
> > > > > saying that the SPLIT block gets a SPLIT clock ... stating
> > > > > the obvious, anyway.
> > > > 
> > > > Right, but what are the other two new clocks? Are they as
> > > > obvious?
> > > > There's no clock-names here to give any more information as to
> > > > what the
> > > > other clocks are supposed to be.
> > > > 
> > > > Kinda unrelated, but I think that "SPLIT Clock" probably isn't
> > > > what the
> > > > name of the clock in the IP block is anyway, sounds more like
> > > > the name
> > > > for it on the provider end..
> > > 
> > > 
 * Thanks for the suggestions. I think Moudy could help on the new
   fixes
> > > for both DT schem and mt8195.dtsi. This patch could be separated
> > > from
> > > origin patch set.
> > 
> > Not sure what you mean about separating it, if you mean correcting
> > the
> > description for the split clock sure. The other stuff I mentioned
> > needs
> > to be resolved before I'm willing to ack this.
> 
> He means separating this patch from the rest of the series that he
> pushed - which
> is okay, as it's a bit mixed anyway :-)
> 
> Besides ... Moudy, can you please help to clarify the description of
> those clocks?
> 
> Cheers,
> Angelo

Greetings,

May I address the check error by adding 2 functional descriptions and
specifying 'minIeims: 1' for this property, and apply the limit by
setting 'maxItems: 3' in MT8195 additional condition?

Sincerely,
Moudy Ho

  reply	other threads:[~2024-09-27  2:27 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-24 10:31 [PATCH 1/6] arm64: dts: mt8195: Fix dtbs_check error for infracfg_ao node Macpaul Lin
2024-09-24 10:31 ` [PATCH 2/6] dt-bindings: iommu: mediatek: Fix interrupt count constraint for new SoCs Macpaul Lin
2024-09-24 16:02   ` Conor Dooley
2024-09-25  6:18     ` Macpaul Lin
2024-09-24 10:31 ` [PATCH 3/6] dt-bindings: display: mediatek: Fix clocks " Macpaul Lin
2024-09-24 11:42   ` AngeloGioacchino Del Regno
2024-09-24 16:00     ` Conor Dooley
2024-09-25  8:42       ` Macpaul Lin
2024-09-25 14:34         ` Conor Dooley
2024-09-26  9:38           ` AngeloGioacchino Del Regno
2024-09-27  2:27             ` Moudy Ho (何宗原) [this message]
2024-09-28 20:14               ` Conor Dooley
2024-09-24 10:31 ` [PATCH 4/6] arm64: dts: mediatek: mt8395-genio-1200-evk: Fix dtbs_check error for phy Macpaul Lin
2024-09-24 11:42   ` AngeloGioacchino Del Regno
2024-09-24 10:31 ` [PATCH 5/6] arm64: dts: mt8195: Fix dtbs_check error for mutex node Macpaul Lin
2024-09-24 11:43   ` AngeloGioacchino Del Regno
2024-09-24 10:31 ` [PATCH 6/6] dt-bindings: display: mediatek: dpi: Add mt8195 support in power domains Macpaul Lin
2024-09-24 11:48   ` AngeloGioacchino Del Regno
2024-09-25  4:02     ` Macpaul Lin
2024-09-24 11:37 ` [PATCH 1/6] arm64: dts: mt8195: Fix dtbs_check error for infracfg_ao node AngeloGioacchino Del Regno

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