From: Rahul Tanwar <rtanwar@maxlinear.com>
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"robh@kernel.org" <robh@kernel.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"mingo@redhat.com" <mingo@redhat.com>,
"bp@alien8.de" <bp@alien8.de>,
"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
"x86@kernel.org" <x86@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"hpa@zytor.com" <hpa@zytor.com>,
"alan@lxorguk.ukuu.org.uk" <alan@lxorguk.ukuu.org.uk>,
"dirk.brandewie@gmail.com" <dirk.brandewie@gmail.com>,
"grant.likely@secretlab.ca" <grant.likely@secretlab.ca>,
"sodaville@linutronix.de" <sodaville@linutronix.de>,
"devicetree-discuss@lists.ozlabs.org"
<devicetree-discuss@lists.ozlabs.org>,
linux-lgm-soc <linux-lgm-soc@maxlinear.com>
Subject: Re: [PATCH v2 1/2] x86/of: Add support for boot time interrupt delivery mode configuration
Date: Wed, 16 Nov 2022 11:27:38 +0000 [thread overview]
Message-ID: <94efde88-ba30-8155-4561-c6b335fec1a2@maxlinear.com> (raw)
In-Reply-To: <Y3S+lLzcmytKHLRq@smile.fi.intel.com>
On 16/11/2022 6:42 pm, Andy Shevchenko wrote:
> This email was sent from outside of MaxLinear.
>
> On Wed, Nov 16, 2022 at 06:28:20PM +0800, Rahul Tanwar wrote:
> > Presently, init/boot time interrupt delivery mode is enumerated
> > only for ACPI enabled systems by parsing MADT table or for older
> > systems by parsing MP table. But for OF based x86 systems, it is
> > assumed & hardcoded to legacy PIC mode. This is a bug for
> > platforms which are OF based but do not use 8259 compliant legacy
> > PIC interrupt controller. Such platforms can not even boot because
> > of this bug/hardcoding.
> >
> > Fix this bug by adding support for configuration of init time
> > interrupt delivery mode for x86 OF based systems by introducing a
> > new optional boolean property 'intel,virtual-wire-mode' for
> > interrupt-controller node of local APIC. This property emulates
> > IMCRP Bit 7 of MP feature info byte 2 of MP floating pointer
> > structure [1].
> >
> > Defaults to legacy PIC mode if absent. Configures it to virtual
> > wire compatibility mode if present.
>
> > [1]
> https://www.manualslib.com/manual/77733/Intel-Multiprocessor.html?page=40#manual <https://www.manualslib.com/manual/77733/Intel-Multiprocessor.html?page=40#manual>
>
> Link: ?
>
> ...
>
> > + if (of_property_read_bool(dn, "intel,virtual-wire-mode")) {
>
> You need a separate patch to show this property being added (yes,
> I have just commented on your patch 2).
>
Well noted about it. Will update. Thanks.
Regards,
Rahul
> > + printk(KERN_NOTICE "Virtual Wire compatibility mode.\n");
> > + pic_mode = 0;
> > + } else {
> > + printk(KERN_NOTICE "IMCR and PIC compatibility mode.\n");
> > + pic_mode = 1;
>
> Why not pr_notice() in both cases?
>
> > + }
>
> --
> With Best Regards,
> Andy Shevchenko
>
next prev parent reply other threads:[~2022-11-16 11:43 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-16 10:28 [PATCH v2 0/2] x86/of: Fix a bug in x86 arch OF support Rahul Tanwar
2022-11-16 10:28 ` [PATCH v2 1/2] x86/of: Add support for boot time interrupt delivery mode configuration Rahul Tanwar
2022-11-16 10:41 ` Rahul Tanwar
2022-11-16 10:42 ` Andy Shevchenko
2022-11-16 11:25 ` Rahul Tanwar
2022-11-16 13:34 ` Andy Shevchenko
2022-11-16 11:27 ` Rahul Tanwar [this message]
2022-11-16 10:28 ` [PATCH v2 2/2] x86/of: Convert & update Intel's APIC related binding schemas Rahul Tanwar
2022-11-16 10:41 ` Rahul Tanwar
2022-11-16 10:41 ` Andy Shevchenko
2022-11-16 10:52 ` Rahul Tanwar
2022-11-16 13:36 ` Andy Shevchenko
2022-11-16 10:41 ` [PATCH v2 0/2] x86/of: Fix a bug in x86 arch OF support Rahul Tanwar
2022-11-16 13:31 ` Andy Shevchenko
2022-11-16 15:29 ` [PATCH v2 2/2] x86/of: Convert & update Intel's APIC related binding schemas Rob Herring
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