From: Georgi Djakov <georgi.djakov@linaro.org>
To: Brian Masney <masneyb@onstation.org>
Cc: agross@kernel.org, bjorn.andersson@linaro.org,
robh+dt@kernel.org, mark.rutland@arm.com,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 5/5] ARM: dts: qcom: msm8974: add interconnect nodes
Date: Wed, 23 Oct 2019 16:51:09 +0300 [thread overview]
Message-ID: <94f957c6-c26b-b1f5-4d0f-6c9aff0a03cd@linaro.org> (raw)
In-Reply-To: <c26159f5-e6fe-07f1-51b3-50b72b258846@linaro.org>
On 23.10.19 г. 16:39 ч., Georgi Djakov wrote:
> On 23.10.19 г. 15:47 ч., Brian Masney wrote:
>> On Wed, Oct 23, 2019 at 02:50:19PM +0300, Georgi Djakov wrote:
>>> On 13.10.19 г. 11:08 ч., Brian Masney wrote:
>>>> Add interconnect nodes that's needed to support bus scaling.
>>>>
>>>> Signed-off-by: Brian Masney <masneyb@onstation.org>
>>>> ---
>>>> arch/arm/boot/dts/qcom-msm8974.dtsi | 60 +++++++++++++++++++++++++++++
>>>> 1 file changed, 60 insertions(+)
>>>>
>>>> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
>>>> @@ -1152,6 +1207,11 @@
>>>> "core",
>>>> "vsync";
>>>>
>>>> + interconnects = <&mmssnoc MNOC_MAS_GRAPHICS_3D &bimc BIMC_SLV_EBI_CH0>,
>>>> + <&ocmemnoc OCMEM_VNOC_MAS_GFX3D &ocmemnoc OCMEM_SLV_OCMEM>;
>>>
>>> Who will be the requesting bandwidth to DDR and ocmem? Is it the display or GPU
>>> or both? The above seem like GPU-related interconnects, so maybe these
>>> properties should be in the GPU DT node.
>>
>> The display is what currently requests the interconnect path,
>> specifically mdp5_setup_interconnect() in
>> drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c. The Freedreno GPU bindings
>> currently don't have interconnect support. Maybe this is something that
>> I should add to that driver as well?
>
> The "mdp0-mem" and "mdp1-mem" paths mentioned in the mdp5_kms.c are the two
> interconnects between the display and DDR memory. There is actually a patch [1]
> to add to GPU bindings, but it seems that we missed to pick it up.
It was actually merged in v5.2.
BR,
Georgi
>>>> + interconnect-names = "mdp0-mem",
>>>> + "mdp1-mem";
>>>
>>> As the second path is not to DDR, but to ocmem, it might be better to call it
>>> something like "gpu-ocmem".
>>
>> I used what mdp5_kms.c expected.
>
> This is for the display and here [2] are some patches for the GPU. Not sure how
> the NoCs are configured on 8974 by default, but if you notice any blue/black
> screens, you may need to request bandwidth for display too.
>
> Thanks,
> Georgi
>
> [1]
> https://lore.kernel.org/r/1555703787-10897-1-git-send-email-jcrouse@codeaurora.org
> [2] https://lore.kernel.org/r/20181220173026.3857-1-jcrouse@codeaurora.org
>
next prev parent reply other threads:[~2019-10-23 13:51 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-13 8:07 [PATCH 0/5] ARM: qcom: add defconfig items and dts nodes Brian Masney
2019-10-13 8:08 ` [PATCH 1/5] ARM: qcom_defconfig: add ocmem support Brian Masney
2019-10-13 8:08 ` [PATCH 2/5] ARM: qcom_defconfig: add msm8974 interconnect support Brian Masney
2019-10-23 8:16 ` Georgi Djakov
2019-10-13 8:08 ` [PATCH 3/5] ARM: qcom_defconfig: add anx78xx HDMI bridge support Brian Masney
2019-10-13 8:08 ` [PATCH 4/5] ARM: dts: qcom: msm8974: add ocmem node Brian Masney
2019-10-13 8:08 ` [PATCH 5/5] ARM: dts: qcom: msm8974: add interconnect nodes Brian Masney
2019-10-23 11:50 ` Georgi Djakov
2019-10-23 12:47 ` Brian Masney
2019-10-23 13:39 ` Georgi Djakov
2019-10-23 13:51 ` Georgi Djakov [this message]
2019-10-24 7:07 ` Brian Masney
2019-10-24 8:27 ` Georgi Djakov
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