From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5510DC77B75 for ; Tue, 18 Apr 2023 01:38:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229619AbjDRBij (ORCPT ); Mon, 17 Apr 2023 21:38:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52340 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229510AbjDRBij (ORCPT ); Mon, 17 Apr 2023 21:38:39 -0400 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5A3A05279; Mon, 17 Apr 2023 18:38:34 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 4510D24E12B; Tue, 18 Apr 2023 09:38:26 +0800 (CST) Received: from EXMBX162.cuchost.com (172.16.6.72) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 18 Apr 2023 09:38:26 +0800 Received: from [192.168.125.106] (113.72.144.253) by EXMBX162.cuchost.com (172.16.6.72) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 18 Apr 2023 09:38:25 +0800 Message-ID: <95dae9c7-ccf9-8e4b-e99b-b4e4bb62257a@starfivetech.com> Date: Tue, 18 Apr 2023 09:38:24 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH v1 1/7] dt-bindings: power: Constrain properties for JH7110 PMU To: Conor Dooley CC: Krzysztof Kozlowski , Conor Dooley , Rob Herring , "Krzysztof Kozlowski" , Emil Renner Berthing , Paul Walmsley , Palmer Dabbelt , Albert Ou , Walker Chen , , , References: <20230411064743.273388-1-changhuang.liang@starfivetech.com> <20230411064743.273388-2-changhuang.liang@starfivetech.com> <20230412-trifle-outplayed-8a1c795fab8b@wendy> <84300997-31f8-b36e-e54e-876c266fc953@starfivetech.com> <20230417-ramrod-carpool-cd05b0def1a2@spud> Content-Language: en-US From: Changhuang Liang In-Reply-To: <20230417-ramrod-carpool-cd05b0def1a2@spud> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [113.72.144.253] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX162.cuchost.com (172.16.6.72) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 2023/4/18 2:55, Conor Dooley wrote: > On Fri, Apr 14, 2023 at 10:20:31AM +0800, Changhuang Liang wrote: >> >> >> On 2023/4/12 19:29, Krzysztof Kozlowski wrote: >>> On 12/04/2023 11:42, Conor Dooley wrote: >>>> On Wed, Apr 12, 2023 at 04:51:16PM +0800, Changhuang Liang wrote: >>>>> >>>>> >>>>> On 2023/4/12 16:35, Krzysztof Kozlowski wrote: >>>>>> On 11/04/2023 08:47, Changhuang Liang wrote: >>>>>>> When use "starfive,jh7110-pmu-dphy" compatible, do not need the reg and >>>>>>> interrupts properties. >>>>> [...] >>>>>>> >>>>>>> description: | >>>>>>> StarFive JH7110 SoC includes support for multiple power domains which can be >>>>>>> @@ -17,6 +18,7 @@ properties: >>>>>>> compatible: >>>>>>> enum: >>>>>>> - starfive,jh7110-pmu >>>>>>> + - starfive,jh7110-pmu-dphy >>>>>> >>>>>> You do here much more than commit msg says. >>>>>> >>>>>> Isn'y DPHY a phy? Why is it in power? >>>>>> >>>>> >>>>> OK, I will add more description. This is a power framework used to turn on/off >>>>> DPHY. So it in power, not a phy. >> >> I found something wrong with my description here, not turn on/off DPHY, >> is turn on/off DPHY power switch. >> >>>> >>>> Perhaps tie it less to its role w/ the phy, and more to do with its >>>> location, say "jh7110-aon-pmu"? >>>> There's already "aon"/"sys"/"stg" stuff used in clock-controller and >>>> syscon compatibles etc. >>>> >>>> Krzysztof, what do you think of that? (if you remember the whole >>>> discussion we previously had about using those identifiers a few weeks >>>> ago). >>> >>> Depends whether this is the same case or not. AFAIR, for AON/SYS/STG >>> these were blocks with few features, not only clock controller. >>> >>> This sounds like just phy. Powering on/off phy is still a job of phy >>> controller... unless it is a power domain controller. >>> Best regards, >>> Krzysztof >>> >> >> So, next version the compatible can be changed to "jh7110-aon-pmu"? > > Hmm, is the dphy the only thing that's power is controlled by registers > in the aon syscon? I tried looking in the "preliminary" TRM that I have, > but it's not really got a proper register map so I could not tell. > > If there are, it'd help your case I think Changhuang Liang. I made a discussion with Walker, We don't use other bit on the visionfive2 board. And I first naming by function. So I will change to "jh7110-aon-pmu" next version.