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From: neil.armstrong@linaro.org
To: Liu Ying <victor.liu@nxp.com>,
	dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Cc: andrzej.hajda@intel.com, rfoss@kernel.org,
	Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se,
	jernej.skrabec@gmail.com, airlied@gmail.com, daniel@ffwll.ch,
	robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
	conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de,
	kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com
Subject: Re: [PATCH 7/9] drm/bridge: synopsys: dw-mipi-dsi: Disable HSTX and LPRX timeout check
Date: Tue, 1 Aug 2023 11:42:50 +0200	[thread overview]
Message-ID: <95dc8275-feae-fd03-48bb-5f27e619c021@linaro.org> (raw)
In-Reply-To: <20230717061831.1826878-8-victor.liu@nxp.com>

On 17/07/2023 08:18, Liu Ying wrote:
> According to Synopsys DW MIPI DSI host databook, HSTX and LPRX timeout
> contention detections are measured in TO_CLK_DIVISION cycles.  However,
> the current driver programs magic values to TO_CLK_DIVISION, HSTX_TO_CNT
> and LPRX_TO_CNT register fields, which makes timeout error event wrongly
> happen for some video modes, at least for the typical 1920x1080p@60 video
> mode read from a HDMI monitor driven by ADV7535 DSI to HDMI bridge.
> While at it, the current driver doesn't enable interrupt to handle or
> complain about the error status, so true error just happens silently
> except for display distortions by visual check.
> 
> Disable the timeout check by setting those timeout register fields to
> zero for now until someone comes along with better computations for the
> timeout values.  Although the databook doesn't mention what happens when
> they are set to zero, it turns out the false error doesn't happen for
> the 1920x1080p@60 video mode at least.
> 
> Signed-off-by: Liu Ying <victor.liu@nxp.com>
> ---
>   drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
> index 536306ccea5a..0fcadf99e783 100644
> --- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
> +++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
> @@ -684,7 +684,7 @@ static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi)
>   	 * timeout clock division should be computed with the
>   	 * high speed transmission counter timeout and byte lane...
>   	 */
> -	dsi_write(dsi, DSI_CLKMGR_CFG, TO_CLK_DIVISION(10) |
> +	dsi_write(dsi, DSI_CLKMGR_CFG, TO_CLK_DIVISION(0) |
>   		  TX_ESC_CLK_DIVISION(esc_clk_division));
>   }
>   
> @@ -747,7 +747,7 @@ static void dw_mipi_dsi_command_mode_config(struct dw_mipi_dsi *dsi)
>   	 * compute high speed transmission counter timeout according
>   	 * to the timeout clock division (TO_CLK_DIVISION) and byte lane...
>   	 */
> -	dsi_write(dsi, DSI_TO_CNT_CFG, HSTX_TO_CNT(1000) | LPRX_TO_CNT(1000));
> +	dsi_write(dsi, DSI_TO_CNT_CFG, HSTX_TO_CNT(0) | LPRX_TO_CNT(0));
>   	/*
>   	 * TODO dw drv improvements
>   	 * the Bus-Turn-Around Timeout Counter should be computed

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>

  reply	other threads:[~2023-08-01  9:46 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-17  6:18 [PATCH 0/9] drm/bridge: imx: Add i.MX93 MIPI DSI support Liu Ying
2023-07-17  6:18 ` [PATCH 1/9] drm/bridge: synopsys: dw-mipi-dsi: Add dw_mipi_dsi_get_bridge() helper Liu Ying
2023-07-17  6:18 ` [PATCH 2/9] drm/bridge: synopsys: dw-mipi-dsi: Add input bus format negotiation support Liu Ying
2023-07-17  6:18 ` [PATCH 3/9] drm/bridge: synopsys: dw-mipi-dsi: Force input bus flags Liu Ying
2023-07-17  6:18 ` [PATCH 4/9] drm/bridge: synopsys: dw-mipi-dsi: Add mode fixup support Liu Ying
2023-07-17  6:18 ` [PATCH 5/9] drm/bridge: synopsys: dw-mipi-dsi: Use pixel clock rate to calculate lbcc Liu Ying
2023-08-01  9:42   ` neil.armstrong
2023-10-16 18:14   ` Heiko Stübner
2023-10-17 10:15     ` Ying Liu
2023-10-17 12:13       ` Heiko Stübner
2023-07-17  6:18 ` [PATCH 6/9] drm/bridge: synopsys: dw-mipi-dsi: Set minimum lane byte clock cycles for HSA and HBP Liu Ying
2023-08-01  9:42   ` neil.armstrong
2023-07-17  6:18 ` [PATCH 7/9] drm/bridge: synopsys: dw-mipi-dsi: Disable HSTX and LPRX timeout check Liu Ying
2023-08-01  9:42   ` neil.armstrong [this message]
2023-07-17  6:18 ` [PATCH 8/9] dt-bindings: display: bridge: Document Freescale i.MX93 MIPI DSI Liu Ying
2023-07-18 22:24   ` Rob Herring
2023-07-17  6:18 ` [PATCH 9/9] drm/bridge: imx: Add i.MX93 MIPI DSI support Liu Ying
2023-07-17  6:44   ` Jagan Teki
2023-07-18  2:58     ` Ying Liu
2023-07-18  9:34       ` Jagan Teki
2023-07-18  9:49         ` Ying Liu
2023-07-18 10:50           ` Jagan Teki
2023-07-19  8:35             ` Ying Liu
2023-07-30 18:38               ` Jagan Teki
2023-07-18  7:49   ` Alexander Stein
2023-07-18  9:00     ` Ying Liu
2023-07-18  9:31       ` Alexander Stein
2023-07-18  9:55         ` Ying Liu
2023-07-18 15:46       ` Sam Ravnborg
2023-07-19  8:37         ` Ying Liu
2023-07-19  1:10   ` kernel test robot
2023-07-18  7:39 ` [PATCH 0/9] " Alexander Stein
2023-07-18  8:52   ` Ying Liu

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