From: Stephen Boyd <sboyd@kernel.org>
To: andersson@kernel.org, conor+dt@kernel.org,
devicetree@vger.kernel.org, djakov@kernel.org,
dmitry.baryshkov@linaro.org, konrad.dybcio@linaro.org,
krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pm@vger.kernel.org, mturquette@baylibre.com,
quic_anusha@quicinc.com, quic_varada@quicinc.com,
robh@kernel.org
Subject: Re: [PATCH v5 4/5] clk: qcom: ipq9574: Use icc-clk for enabling NoC related clocks
Date: Thu, 28 Mar 2024 14:51:09 -0700 [thread overview]
Message-ID: <95f4e99a60cc97770fc3cee850b62faf.sboyd@kernel.org> (raw)
In-Reply-To: <20240328075936.223461-5-quic_varada@quicinc.com>
Quoting Varadarajan Narayanan (2024-03-28 00:59:35)
> diff --git a/drivers/clk/qcom/gcc-ipq9574.c b/drivers/clk/qcom/gcc-ipq9574.c
> index 0a3f846695b8..187fd9dcdf49 100644
> --- a/drivers/clk/qcom/gcc-ipq9574.c
> +++ b/drivers/clk/qcom/gcc-ipq9574.c
> @@ -4301,6 +4302,56 @@ static const struct qcom_reset_map gcc_ipq9574_resets[] = {
> [GCC_WCSS_Q6_TBU_BCR] = { 0x12054, 0 },
> };
>
> +#define IPQ_APPS_ID 9574 /* some unique value */
How is this supposed to stay unique? I don't understand
icc_node_create() API quite honestly. Why can't icc_clk_register()
maintain some ida of allocated numbers? Or is there some global number
space that we can "reserve" from? I'm quite amazed this is how things
are connected in interconnect framework.
> +
> +enum {
> + ICC_ANOC_PCIE0,
> + ICC_SNOC_PCIE0,
> + ICC_ANOC_PCIE1,
> + ICC_SNOC_PCIE1,
> + ICC_ANOC_PCIE2,
> + ICC_SNOC_PCIE2,
> + ICC_ANOC_PCIE3,
> + ICC_SNOC_PCIE3,
> + ICC_SNOC_USB,
> + ICC_ANOC_USB_AXI,
> + ICC_NSSNOC_NSSCC,
> + ICC_NSSNOC_SNOC_0,
> + ICC_NSSNOC_SNOC_1,
> + ICC_NSSNOC_PCNOC_1,
> + ICC_NSSNOC_QOSGEN_REF,
> + ICC_NSSNOC_TIMEOUT_REF,
> + ICC_NSSNOC_XO_DCD,
> + ICC_NSSNOC_ATB,
> + ICC_MEM_NOC_NSSNOC,
> + ICC_NSSNOC_MEMNOC,
> + ICC_NSSNOC_MEM_NOC_1,
> +};
Are these supposed to be in a dt-binding header?
> +
> +static struct clk_hw *icc_ipq9574_hws[] = {
> + [ICC_ANOC_PCIE0] = &gcc_anoc_pcie0_1lane_m_clk.clkr.hw,
> + [ICC_SNOC_PCIE0] = &gcc_anoc_pcie1_1lane_m_clk.clkr.hw,
> + [ICC_ANOC_PCIE1] = &gcc_anoc_pcie2_2lane_m_clk.clkr.hw,
> + [ICC_SNOC_PCIE1] = &gcc_anoc_pcie3_2lane_m_clk.clkr.hw,
> + [ICC_ANOC_PCIE2] = &gcc_snoc_pcie0_1lane_s_clk.clkr.hw,
> + [ICC_SNOC_PCIE2] = &gcc_snoc_pcie1_1lane_s_clk.clkr.hw,
next prev parent reply other threads:[~2024-03-28 21:51 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-28 7:59 [PATCH v5 0/5] Add interconnect driver for IPQ9574 SoC Varadarajan Narayanan
2024-03-28 7:59 ` [PATCH v5 1/5] dt-bindings: interconnect: Add Qualcomm IPQ9574 support Varadarajan Narayanan
2024-03-30 10:30 ` Krzysztof Kozlowski
2024-03-28 7:59 ` [PATCH v5 2/5] interconnect: icc-clk: Add devm_icc_clk_register Varadarajan Narayanan
2024-03-28 7:59 ` [PATCH v5 3/5] clk: qcom: common: Add interconnect clocks support Varadarajan Narayanan
2024-03-28 21:54 ` Stephen Boyd
2024-03-29 10:48 ` Varadarajan Narayanan
2024-04-05 21:25 ` Stephen Boyd
2024-03-28 7:59 ` [PATCH v5 4/5] clk: qcom: ipq9574: Use icc-clk for enabling NoC related clocks Varadarajan Narayanan
2024-03-28 21:51 ` Stephen Boyd [this message]
2024-03-29 10:55 ` Varadarajan Narayanan
2024-03-29 12:10 ` Krzysztof Kozlowski
2024-03-30 9:30 ` Varadarajan Narayanan
2024-03-30 10:28 ` Krzysztof Kozlowski
2024-03-30 11:17 ` Varadarajan Narayanan
2024-04-01 14:20 ` kernel test robot
2024-03-28 7:59 ` [PATCH v5 5/5] arm64: dts: qcom: ipq9574: Add icc provider ability to gcc Varadarajan Narayanan
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