From: Kishon Vijay Abraham I <kishon@ti.com>
To: Aswath Govindraju <a-govindraju@ti.com>
Cc: Vignesh Raghavendra <vigneshr@ti.com>,
Lokesh Vutla <lokeshvutla@ti.com>,
Grygorii Strashko <grygorii.strashko@ti.com>,
Nishanth Menon <nm@ti.com>, Tero Kristo <kristo@kernel.org>,
Rob Herring <robh+dt@kernel.org>, Faiz Abbas <faiz_abbas@ti.com>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] arm64: dts: ti: k3-j721e-main: Update the speed modes supported and their itap delay values for MMCSD subsystems
Date: Mon, 1 Mar 2021 10:59:40 +0530 [thread overview]
Message-ID: <969c38e2-01e8-55a1-b97e-cf72f07fcd62@ti.com> (raw)
In-Reply-To: <20210225132736.26429-1-a-govindraju@ti.com>
On 25/02/21 6:57 pm, Aswath Govindraju wrote:
> According to latest errata of J721e [1], HS400 mode is not supported
> in MMCSD0 subsystem (i2024) and SDR104 mode is not supported in MMCSD1/2
> subsystems (i2090). Therefore, replace mmc-hs400-1_8v with mmc-hs200-1_8v
> in MMCSD0 subsystem and add a sdhci mask to disable SDR104 speed mode.
>
> Also, update the itap delay values for all the MMCSD subsystems according
> the latest J721e data sheet[2]
>
> [1] - https://www.ti.com/lit/er/sprz455/sprz455.pdf
> [2] - https://www.ti.com/lit/ds/symlink/tda4vm.pdf
>
> Fixes: e6dc10f200da ("arm64: dts: ti: j721e-main: Add SDHCI nodes")
> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Thanks
Kishon
> ---
> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 17 ++++++++++++++++-
> 1 file changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> index 8c84dafb7125..f1e7da3dfa27 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> @@ -1042,13 +1042,16 @@
> assigned-clocks = <&k3_clks 91 1>;
> assigned-clock-parents = <&k3_clks 91 2>;
> bus-width = <8>;
> - mmc-hs400-1_8v;
> + mmc-hs200-1_8v;
> mmc-ddr-1_8v;
> ti,otap-del-sel-legacy = <0xf>;
> ti,otap-del-sel-mmc-hs = <0xf>;
> ti,otap-del-sel-ddr52 = <0x5>;
> ti,otap-del-sel-hs200 = <0x6>;
> ti,otap-del-sel-hs400 = <0x0>;
> + ti,itap-del-sel-legacy = <0x10>;
> + ti,itap-del-sel-mmc-hs = <0xa>;
> + ti,itap-del-sel-ddr52 = <0x3>;
> ti,trm-icp = <0x8>;
> ti,strobe-sel = <0x77>;
> dma-coherent;
> @@ -1069,9 +1072,15 @@
> ti,otap-del-sel-sdr25 = <0xf>;
> ti,otap-del-sel-sdr50 = <0xc>;
> ti,otap-del-sel-ddr50 = <0xc>;
> + ti,itap-del-sel-legacy = <0x0>;
> + ti,itap-del-sel-sd-hs = <0x0>;
> + ti,itap-del-sel-sdr12 = <0x0>;
> + ti,itap-del-sel-sdr25 = <0x0>;
> + ti,itap-del-sel-ddr50 = <0x2>;
> ti,trm-icp = <0x8>;
> ti,clkbuf-sel = <0x7>;
> dma-coherent;
> + sdhci-caps-mask = <0x2 0x0>;
> };
>
> main_sdhci2: mmc@4f98000 {
> @@ -1089,9 +1098,15 @@
> ti,otap-del-sel-sdr25 = <0xf>;
> ti,otap-del-sel-sdr50 = <0xc>;
> ti,otap-del-sel-ddr50 = <0xc>;
> + ti,itap-del-sel-legacy = <0x0>;
> + ti,itap-del-sel-sd-hs = <0x0>;
> + ti,itap-del-sel-sdr12 = <0x0>;
> + ti,itap-del-sel-sdr25 = <0x0>;
> + ti,itap-del-sel-ddr50 = <0x2>;
> ti,trm-icp = <0x8>;
> ti,clkbuf-sel = <0x7>;
> dma-coherent;
> + sdhci-caps-mask = <0x2 0x0>;
> };
>
> usbss0: cdns-usb@4104000 {
>
next prev parent reply other threads:[~2021-03-01 5:31 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-25 13:27 [PATCH] arm64: dts: ti: k3-j721e-main: Update the speed modes supported and their itap delay values for MMCSD subsystems Aswath Govindraju
2021-03-01 5:29 ` Kishon Vijay Abraham I [this message]
2021-03-05 5:14 ` Nishanth Menon
2021-03-05 5:33 ` Aswath Govindraju
2021-03-01 15:23 ` Nishanth Menon
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