From: Jianjun Wang <jianjun.wang@mediatek.com>
To: Frank Wunderlich <linux@fw-web.de>, <linux-mediatek@lists.infradead.org>
Cc: Frank Wunderlich <frank-w@public-files.de>,
Ryder Lee <ryder.lee@mediatek.com>,
Sam Shih <Sam.Shih@mediatek.com>,
Steven Liu <steven.liu@mediatek.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 1/3] dt-bindings: PCI: mediatek-gen3: add SoC based clock config
Date: Tue, 25 Oct 2022 09:27:27 +0800 [thread overview]
Message-ID: <9759df8a6fbe30bfbd0df72793b751b7628006bc.camel@mediatek.com> (raw)
In-Reply-To: <20221023170234.83621-2-linux@fw-web.de>
On Sun, 2022-10-23 at 19:02 +0200, Frank Wunderlich wrote:
> From: Frank Wunderlich <frank-w@public-files.de>
>
> The PCIe driver covers different SOC which needing different clock
> configs. Define them based on compatible.
>
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
> ---
> .../bindings/pci/mediatek-pcie-gen3.yaml | 48 ++++++++++++++---
> --
> 1 file changed, 36 insertions(+), 12 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-
> gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-
> gen3.yaml
> index c00be39af64e..af0d2201746d 100644
> --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> @@ -43,9 +43,6 @@ description: |+
> each set has its own address for MSI message, and supports 32 MSI
> vectors
> to generate interrupt.
>
> -allOf:
> - - $ref: /schemas/pci/pci-bus.yaml#
> -
> properties:
> compatible:
> oneOf:
> @@ -84,15 +81,7 @@ properties:
> maxItems: 6
>
> clock-names:
> - items:
> - - const: pl_250m
> - - const: tl_26m
> - - const: tl_96m
> - - const: tl_32k
> - - const: peri_26m
> - - enum:
> - - top_133m # for MT8192
> - - peri_mem # for MT8188/MT8195
> + maxItems: 6
>
> assigned-clocks:
> maxItems: 1
> @@ -138,6 +127,41 @@ required:
> - '#interrupt-cells'
> - interrupt-controller
>
> +allOf:
> + - $ref: /schemas/pci/pci-bus.yaml#
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: mediatek,mt8192-mmc
This should be "mediatek,mt8192-pcie".
> + then:
> + properties:
> + clock-names:
> + items:
> + - const: pl_250m
> + - const: tl_26m
> + - const: tl_96m
> + - const: tl_32k
> + - const: peri_26m
> + - const: top_133m
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - mediatek,mt8188-pcie
> + - mediatek,mt8195-pcie
> + then:
> + properties:
> + clock-names:
> + items:
> + - const: pl_250m
> + - const: tl_26m
> + - const: tl_96m
> + - const: tl_32k
> + - const: peri_26m
> + - const: peri_mem
> +
> unevaluatedProperties: false
>
> examples:
next prev parent reply other threads:[~2022-10-25 1:44 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-23 17:02 [PATCH 0/3] rework mtk pcie-gen3 bindings and support mt7986 Frank Wunderlich
2022-10-23 17:02 ` [PATCH 1/3] dt-bindings: PCI: mediatek-gen3: add SoC based clock config Frank Wunderlich
2022-10-24 19:21 ` Rob Herring
2022-10-25 1:27 ` Jianjun Wang [this message]
2022-10-23 17:02 ` [PATCH 2/3] dt-bindings: PCI: mediatek-gen3: add support for mt7986 Frank Wunderlich
2022-10-23 17:02 ` [PATCH 3/3] dt-bindings: PCI: mediatek-gen3: add mt7986 clock config Frank Wunderlich
2022-10-24 19:23 ` Rob Herring
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