From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84550C43461 for ; Thu, 17 Sep 2020 10:46:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3EA022074B for ; Thu, 17 Sep 2020 10:46:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1600339581; bh=Y3pNyjgpqIuPmidpfw5syd0Vtwjq4sR1GRHDIvultYU=; h=Date:From:To:Cc:Subject:In-Reply-To:References:List-ID:From; b=Ac2f8As70+TP+liWWJXS5iwui0P+25jhD95HbZPAj26nQboyP+CHT/JsjP+tm3L5U UF9AZTAsLhXLGS1WwVIKYL9tILaR/1LMBntAudF35Kbih+tSuqyjVWi0IBe+CUFrPD 7mGpAqM96bqNcma1J4UZlDWGtdcJOkvkCJ5GsMbA= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726731AbgIQKpO (ORCPT ); Thu, 17 Sep 2020 06:45:14 -0400 Received: from mail.kernel.org ([198.145.29.99]:55282 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726673AbgIQKpL (ORCPT ); Thu, 17 Sep 2020 06:45:11 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 4B6802074B; Thu, 17 Sep 2020 10:45:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1600339510; bh=Y3pNyjgpqIuPmidpfw5syd0Vtwjq4sR1GRHDIvultYU=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=uZM3YnUfcF23+TJ0a0nblZ4x9bUao61YD2kRnz0gDu5l74v5xplkAWK4CZzWKZTwY JhxlawsmeVyf3smotvrKUrWA3Ge+WYhZwgcAZshKunNVU/4e3ZJjPVmwkqiLbfnUkX 4KTFGgpTlgOwTjVh+x74i3YRJ8kcpToc480koSdY= Received: from disco-boy.misterjones.org ([51.254.78.96] helo=www.loen.fr) by disco-boy.misterjones.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1kIrPY-00Cbmd-Co; Thu, 17 Sep 2020 11:45:08 +0100 MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Thu, 17 Sep 2020 11:45:08 +0100 From: Marc Zyngier To: Grzegorz Jaszczyk Cc: tglx@linutronix.de, jason@lakedaemon.net, s-anna@ti.com, robh+dt@kernel.org, lee.jones@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, david@lechnology.com, praneeth@ti.com Subject: Re: [PATCH v7 0/5] Add TI PRUSS Local Interrupt Controller IRQChip driver In-Reply-To: <1600274110-30384-1-git-send-email-grzegorz.jaszczyk@linaro.org> References: <1600274110-30384-1-git-send-email-grzegorz.jaszczyk@linaro.org> User-Agent: Roundcube Webmail/1.4.8 Message-ID: <9797030dd2c11b24ae0f7ef760f12ffa@kernel.org> X-Sender: maz@kernel.org X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: grzegorz.jaszczyk@linaro.org, tglx@linutronix.de, jason@lakedaemon.net, s-anna@ti.com, robh+dt@kernel.org, lee.jones@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, david@lechnology.com, praneeth@ti.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 2020-09-16 17:35, Grzegorz Jaszczyk wrote: > Hi All, > > The following is a v7 version of the series [1-6] that adds an IRQChip > driver for the local interrupt controller present within a Programmable > Real-Time Unit and Industrial Communication Subsystem (PRU-ICSS) > present on a > number of TI SoCs including OMAP architecture based AM335x, AM437x, > AM57xx SoCs, > Keystone 2 architecture based 66AK2G SoCs, Davinci architecture based > OMAP-L138/DA850 SoCs and the latest K3 architecture based AM65x and > J721E SoCs. > Please see the v1 cover-letter [1] for details about the features of > this > interrupt controller. More details can be found in any of the > supported SoC > TRMs. Eg: Chapter 30.1.6 of AM5728 TRM [7] > > Please see the individual patches for exact changes in each patch, > following are > the main changes from v5: > - Add Co-developed-by tags. > - Change the irq type to IRQ_TYPE_LEVEL_HIGH in patch #2. Applied to irq/irqchip-next. M. -- Jazz is not dead. It just smells funny...