[PATCH 0/3] Minor updates in the IPQ5332 DTS files

[PATCH 0/3] Minor updates in the IPQ5332 DTS files

[Kathiravan T]

Rename the MI01.2 DTS after Reference Design Platform(RDP) number to align
with ipq5332-rdp468.dts, add UART1 node and reserve memory for U-boot
and SBL to avoid loosing the RAM contents which will be used in post
morterm analysis.

Bjorn, since these are minor updates, it would be great if you could
possibly pick up this series for v6.4.

Kathiravan T (3):
  arm64: dts: qcom: ipq5332: rename mi01.2 dts to rdp441
  arm64: dts: qcom: ipq5332: define UART1
  arm64: dts: qcom: ipq5332: add few more reserved memory region

 arch/arm64/boot/dts/qcom/Makefile             |  2 +-
 ...{ipq5332-mi01.2.dts => ipq5332-rdp441.dts} |  0
 arch/arm64/boot/dts/qcom/ipq5332.dtsi         | 20 +++++++++++++++++++
 3 files changed, 21 insertions(+), 1 deletion(-)
 rename arch/arm64/boot/dts/qcom/{ipq5332-mi01.2.dts => ipq5332-rdp441.dts} (100%)

-- 
2.17.1

[PATCH 1/3] arm64: dts: qcom: ipq5332: rename mi01.2 dts to rdp441

[Kathiravan T]

To align with ipq5332-rdp468.dts, lets rename the mi01.2 dts as well to
ipq5332-rdp441.dts.

Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
---
 arch/arm64/boot/dts/qcom/Makefile                               | 2 +-
 .../boot/dts/qcom/{ipq5332-mi01.2.dts => ipq5332-rdp441.dts}    | 0
 2 files changed, 1 insertion(+), 1 deletion(-)
 rename arch/arm64/boot/dts/qcom/{ipq5332-mi01.2.dts => ipq5332-rdp441.dts} (100%)

diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index e0e2def48470..42736c46203c 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -3,7 +3,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= apq8016-sbc.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= apq8094-sony-xperia-kitakami-karin_windy.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= apq8096-db820c.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= apq8096-ifc6640.dtb
-dtb-$(CONFIG_ARCH_QCOM)	+= ipq5332-mi01.2.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= ipq5332-rdp441.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= ipq5332-rdp468.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= ipq6018-cp01-c1.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= ipq8074-hk01.dtb
diff --git a/arch/arm64/boot/dts/qcom/ipq5332-mi01.2.dts b/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts
similarity index 100%
rename from arch/arm64/boot/dts/qcom/ipq5332-mi01.2.dts
rename to arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts
-- 
2.17.1

[PATCH 2/3] arm64: dts: qcom: ipq5332: define UART1

[Kathiravan T]

Add the definition for the UART1 found on IPQ5332 SoC.

Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
---
 arch/arm64/boot/dts/qcom/ipq5332.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
index 12e0e179e139..c32217530b41 100644
--- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
@@ -218,6 +218,16 @@
 			status = "disabled";
 		};
 
+		blsp1_uart1: serial@78b0000 {
+			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+			reg = <0x078b0000 0x200>;
+			interrupts = <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
+				 <&gcc GCC_BLSP1_AHB_CLK>;
+			clock-names = "core", "iface";
+			status = "disabled";
+		};
+
 		blsp1_spi0: spi@78b5000 {
 			compatible = "qcom,spi-qup-v2.2.1";
 			reg = <0x078b5000 0x600>;
-- 
2.17.1

[PATCH 3/3] arm64: dts: qcom: ipq5332: add few more reserved memory region

[Kathiravan T]

In IPQ SoCs, U-boot will collect the system RAM contents upon crash for
the post morterm analysis. If we don't reserve the memory region used by
U-boot, obviously linux will consume it and upon next boot on crash, uboot
will be loaded in the same region, which will lead to loose some of the
data, sometimes we may miss out critical information. So lets reserve the
region used by the U-boot.

Similarly SBL copies some data into the reserved region and it will be
used in the crash scenario. So reserve 1MB for SBL as well.

Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
---
 arch/arm64/boot/dts/qcom/ipq5332.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
index c32217530b41..aec60840a2f0 100644
--- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
@@ -114,6 +114,16 @@
 		#size-cells = <2>;
 		ranges;
 
+		uboot@4a100000 {
+			reg = <0x0 0x4a100000 0x0 0x400000>;
+			no-map;
+		};
+
+		sbl@4a500000 {
+			reg = <0x0 0x4a500000 0x0 0x100000>;
+			no-map;
+		};
+
 		tz_mem: tz@4a600000 {
 			reg = <0x0 0x4a600000 0x0 0x200000>;
 			no-map;
-- 
2.17.1

Re: [PATCH 0/3] Minor updates in the IPQ5332 DTS files

[Kathiravan T]

On 4/12/2023 10:19 PM, Kathiravan T wrote:
> Rename the MI01.2 DTS after Reference Design Platform(RDP) number to align
> with ipq5332-rdp468.dts, add UART1 node and reserve memory for U-boot
> and SBL to avoid loosing the RAM contents which will be used in post
> morterm analysis.
>
> Bjorn, since these are minor updates, it would be great if you could
> possibly pick up this series for v6.4.
>
> Kathiravan T (3):
>    arm64: dts: qcom: ipq5332: rename mi01.2 dts to rdp441
>    arm64: dts: qcom: ipq5332: define UART1
>    arm64: dts: qcom: ipq5332: add few more reserved memory region


Gentle Reminder...


>
>   arch/arm64/boot/dts/qcom/Makefile             |  2 +-
>   ...{ipq5332-mi01.2.dts => ipq5332-rdp441.dts} |  0
>   arch/arm64/boot/dts/qcom/ipq5332.dtsi         | 20 +++++++++++++++++++
>   3 files changed, 21 insertions(+), 1 deletion(-)
>   rename arch/arm64/boot/dts/qcom/{ipq5332-mi01.2.dts => ipq5332-rdp441.dts} (100%)
>

Re: [PATCH 1/3] arm64: dts: qcom: ipq5332: rename mi01.2 dts to rdp441

[Konrad Dybcio]

On 12.04.2023 18:49, Kathiravan T wrote:
> To align with ipq5332-rdp468.dts, lets rename the mi01.2 dts as well to
> ipq5332-rdp441.dts.
> 
> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
> ---
If the name property is supposed to stay as-is:

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
>  arch/arm64/boot/dts/qcom/Makefile                               | 2 +-
>  .../boot/dts/qcom/{ipq5332-mi01.2.dts => ipq5332-rdp441.dts}    | 0
>  2 files changed, 1 insertion(+), 1 deletion(-)
>  rename arch/arm64/boot/dts/qcom/{ipq5332-mi01.2.dts => ipq5332-rdp441.dts} (100%)
> 
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index e0e2def48470..42736c46203c 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -3,7 +3,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= apq8016-sbc.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= apq8094-sony-xperia-kitakami-karin_windy.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= apq8096-db820c.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= apq8096-ifc6640.dtb
> -dtb-$(CONFIG_ARCH_QCOM)	+= ipq5332-mi01.2.dtb
> +dtb-$(CONFIG_ARCH_QCOM)	+= ipq5332-rdp441.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= ipq5332-rdp468.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= ipq6018-cp01-c1.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= ipq8074-hk01.dtb
> diff --git a/arch/arm64/boot/dts/qcom/ipq5332-mi01.2.dts b/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts
> similarity index 100%
> rename from arch/arm64/boot/dts/qcom/ipq5332-mi01.2.dts
> rename to arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts

Re: [PATCH 2/3] arm64: dts: qcom: ipq5332: define UART1

[Konrad Dybcio]

On 12.04.2023 18:49, Kathiravan T wrote:
> Add the definition for the UART1 found on IPQ5332 SoC.
> 
> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
>  arch/arm64/boot/dts/qcom/ipq5332.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
> index 12e0e179e139..c32217530b41 100644
> --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
> @@ -218,6 +218,16 @@
>  			status = "disabled";
>  		};
>  
> +		blsp1_uart1: serial@78b0000 {
> +			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
> +			reg = <0x078b0000 0x200>;
> +			interrupts = <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
> +				 <&gcc GCC_BLSP1_AHB_CLK>;
> +			clock-names = "core", "iface";
> +			status = "disabled";
> +		};
> +
>  		blsp1_spi0: spi@78b5000 {
>  			compatible = "qcom,spi-qup-v2.2.1";
>  			reg = <0x078b5000 0x600>;

Re: [PATCH 3/3] arm64: dts: qcom: ipq5332: add few more reserved memory region

[Konrad Dybcio]

On 12.04.2023 18:49, Kathiravan T wrote:
> In IPQ SoCs, U-boot will collect the system RAM contents upon crash for
> the post morterm
s/post morterm/post-mortem ; s/the//

 analysis. If we don't reserve the memory region used by
> U-boot, obviously linux will consume it and upon next boot on crash, uboot
> will be loaded in the same region, which will lead to loose
s/loose/loss

some of the
> data, sometimes we may miss out critical information.
So.. is it used to store crash data, or do you load u-boot there?

Or is there some software running at a higher exception level that
collects the dumps and stores it to this region?

Are these regions only used for some sort of crashdump colection?
If so, they could get some more specific names, e.g. uboot-crashdump
or so.

Konrad
So lets reserve the
> region used by the U-boot.
> 
> Similarly SBL copies some data into the reserved region and it will be
> used in the crash scenario. So reserve 1MB for SBL as well> 
> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/ipq5332.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
> index c32217530b41..aec60840a2f0 100644
> --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
> @@ -114,6 +114,16 @@
>  		#size-cells = <2>;
>  		ranges;
>  
> +		uboot@4a100000 {
> +			reg = <0x0 0x4a100000 0x0 0x400000>;
> +			no-map;
> +		};
> +
> +		sbl@4a500000 {
> +			reg = <0x0 0x4a500000 0x0 0x100000>;
> +			no-map;
> +		};
> +
>  		tz_mem: tz@4a600000 {
>  			reg = <0x0 0x4a600000 0x0 0x200000>;
>  			no-map;