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From: Nicolas Ferre <nicolas.ferre@microchip.com>
To: Claudiu Beznea - M18063 <Claudiu.Beznea@microchip.com>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Ludovic Desroches - M43218 <Ludovic.Desroches@microchip.com>,
	"linux@armlinux.org.uk" <linux@armlinux.org.uk>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: Re: [PATCH 2/3] ARM: at91: pm: group constants and addresses loading
Date: Mon, 4 Oct 2021 12:11:25 +0200	[thread overview]
Message-ID: <98829cc8-ee9b-d600-58d7-eb3d74263c9c@microchip.com> (raw)
In-Reply-To: <fe93c4ae-4ac4-02e2-ce4a-03ead76e65e6@microchip.com>

On 30/09/2021 at 12:16, Claudiu Beznea - M18063 wrote:
> On 28.09.2021 13:01, Alexandre Belloni wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>
>> Hello,
>>
>> On 28/09/2021 11:42:56+0300, Claudiu Beznea wrote:
>>> Group constants and addresses loading. This commit prepares the field for
>>> the next one. Added fixes tag on this commit as the next one will fail
>>> to apply if backported alone to older kernels.
>>
>> The proper notation is to use Depends-on: on the next patch.
> 
> At the moment this patch has no sha1 associated so I will ask Nicolas to
> add the Depends-on when he will take it. Do you see other options?

Depends-on added when queuing on at91-fixes.

Thanks, best regards,
   Nicolas

>>> Fixes: f0bbf17958e8 ("ARM: at91: pm: add self-refresh support for sama7g5")
>>> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
>>> ---
>>>   arch/arm/mach-at91/pm_suspend.S | 17 +++++++++--------
>>>   1 file changed, 9 insertions(+), 8 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
>>> index cbd61a3bcab1..34f251fdb743 100644
>>> --- a/arch/arm/mach-at91/pm_suspend.S
>>> +++ b/arch/arm/mach-at91/pm_suspend.S
>>> @@ -1014,6 +1014,15 @@ ENTRY(at91_pm_suspend_in_sram)
>>>        mov     tmp1, #0
>>>        mcr     p15, 0, tmp1, c7, c10, 4
>>>
>>> +     ldr     tmp1, [r0, #PM_DATA_PMC_MCKR_OFFSET]
>>> +     str     tmp1, .mckr_offset
>>> +     ldr     tmp1, [r0, #PM_DATA_PMC_VERSION]
>>> +     str     tmp1, .pmc_version
>>> +     ldr     tmp1, [r0, #PM_DATA_MEMCTRL]
>>> +     str     tmp1, .memtype
>>> +     ldr     tmp1, [r0, #PM_DATA_MODE]
>>> +     str     tmp1, .pm_mode
>>> +
>>>        ldr     tmp1, [r0, #PM_DATA_PMC]
>>>        str     tmp1, .pmc_base
>>>        ldr     tmp1, [r0, #PM_DATA_RAMC0]
>>> @@ -1022,14 +1031,6 @@ ENTRY(at91_pm_suspend_in_sram)
>>>        str     tmp1, .sramc1_base
>>>        ldr     tmp1, [r0, #PM_DATA_RAMC_PHY]
>>>        str     tmp1, .sramc_phy_base
>>> -     ldr     tmp1, [r0, #PM_DATA_MEMCTRL]
>>> -     str     tmp1, .memtype
>>> -     ldr     tmp1, [r0, #PM_DATA_MODE]
>>> -     str     tmp1, .pm_mode
>>> -     ldr     tmp1, [r0, #PM_DATA_PMC_MCKR_OFFSET]
>>> -     str     tmp1, .mckr_offset
>>> -     ldr     tmp1, [r0, #PM_DATA_PMC_VERSION]
>>> -     str     tmp1, .pmc_version
>>>        /* Both ldrne below are here to preload their address in the TLB */
>>>        ldr     tmp1, [r0, #PM_DATA_SHDWC]
>>>        str     tmp1, .shdwc
>>> --
>>> 2.25.1
>>>
>>
>> --
>> Alexandre Belloni, co-owner and COO, Bootlin
>> Embedded Linux and Kernel engineering
>> https://bootlin.com
>>
> 


-- 
Nicolas Ferre

  reply	other threads:[~2021-10-04 10:11 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-28  8:42 [PATCH 0/3] ARM: at91: pm: fixes Claudiu Beznea
2021-09-28  8:42 ` [PATCH 1/3] ARM: dts: at91: sama7g5ek: add suspend voltage for ddr3l rail Claudiu Beznea
2021-09-28  8:42 ` [PATCH 2/3] ARM: at91: pm: group constants and addresses loading Claudiu Beznea
2021-09-28 10:01   ` Alexandre Belloni
2021-09-30 10:16     ` Claudiu.Beznea
2021-10-04 10:11       ` Nicolas Ferre [this message]
2021-09-28  8:42 ` [PATCH 3/3] ARM: at91: pm: preload base address of controllers in tlb Claudiu Beznea
2021-09-28 10:01   ` Alexandre Belloni

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