* [3/4] dt-bindings: interconnect: Add clock property to enable QOS on SC7280
[not found] <20240122143030.11904-1-quic_okukatla@quicinc.com>
@ 2024-01-22 14:30 ` Odelu Kukatla
2024-01-22 14:47 ` Krzysztof Kozlowski
2024-01-22 14:30 ` [4/4] arm64: dts: qcom: sc7280: Add clocks for QOS configuration Odelu Kukatla
1 sibling, 1 reply; 5+ messages in thread
From: Odelu Kukatla @ 2024-01-22 14:30 UTC (permalink / raw)
To: georgi.djakov, Bjorn Andersson, Konrad Dybcio, Georgi Djakov,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-arm-msm,
linux-pm, devicetree, linux-kernel
Added clock property to enable clocks required for accessing
qos registers.
Change-Id: Ie0478cc7ae9742742e2389cfa37ee57bab1aa320
Signed-off-by: Odelu Kukatla <quic_okukatla@quicinc.com>
---
.../interconnect/qcom,sc7280-rpmh.yaml | 49 +++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml
index b135597d9489..758a6e924037 100644
--- a/Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml
+++ b/Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml
@@ -53,10 +53,50 @@ allOf:
required:
- reg
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sc7280-aggre1-noc
+ then:
+ properties:
+ clocks:
+ items:
+ - description: aggre UFS PHY AXI clock
+ - description: aggre USB3 PRIM AXI clock
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sc7280-aggre2-noc
+ then:
+ properties:
+ clocks:
+ items:
+ - description: RPMH CC IPA clock
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sc7280-aggre1-noc
+ - qcom,sc7280-aggre2-noc
+ then:
+ required:
+ - clocks
+ else:
+ properties:
+ clocks: false
+
unevaluatedProperties: false
examples:
- |
+ #include <dt-bindings/clock/qcom,gcc-sc7280.h>
interconnect {
compatible = "qcom,sc7280-clk-virt";
#interconnect-cells = <2>;
@@ -69,3 +109,12 @@ examples:
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
+
+ interconnect@16e0000 {
+ reg = <0x016e0000 0x1c080>;
+ compatible = "qcom,sc7280-aggre1-noc";
+ #interconnect-cells = <2>;
+ qcom,bcm-voters = <&apps_bcm_voter>;
+ clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
+ <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
+ };
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [4/4] arm64: dts: qcom: sc7280: Add clocks for QOS configuration
[not found] <20240122143030.11904-1-quic_okukatla@quicinc.com>
2024-01-22 14:30 ` [3/4] dt-bindings: interconnect: Add clock property to enable QOS on SC7280 Odelu Kukatla
@ 2024-01-22 14:30 ` Odelu Kukatla
2024-01-22 17:43 ` Dmitry Baryshkov
1 sibling, 1 reply; 5+ messages in thread
From: Odelu Kukatla @ 2024-01-22 14:30 UTC (permalink / raw)
To: georgi.djakov, cros-qcom-dts-watchers, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-msm, devicetree, linux-kernel
Add clock handles for required clocks to be enabled for
configuring QoS on sc7280.
Change-Id: I58991300ff1d8d2865763d4e79ee81c03586249e
Signed-off-by: Odelu Kukatla <quic_okukatla@quicinc.com>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 83b5b76ba179..73acf1bd0f97 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2099,6 +2099,8 @@
reg = <0 0x016e0000 0 0x1c080>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
+ clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
+ <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
};
aggre2_noc: interconnect@1700000 {
@@ -2106,6 +2108,7 @@
compatible = "qcom,sc7280-aggre2-noc";
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
+ clocks = <&rpmhcc RPMH_IPA_CLK>;
};
mmss_noc: interconnect@1740000 {
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [3/4] dt-bindings: interconnect: Add clock property to enable QOS on SC7280
2024-01-22 14:30 ` [3/4] dt-bindings: interconnect: Add clock property to enable QOS on SC7280 Odelu Kukatla
@ 2024-01-22 14:47 ` Krzysztof Kozlowski
0 siblings, 0 replies; 5+ messages in thread
From: Krzysztof Kozlowski @ 2024-01-22 14:47 UTC (permalink / raw)
To: Odelu Kukatla, georgi.djakov, Bjorn Andersson, Konrad Dybcio,
Georgi Djakov, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-msm, linux-pm, devicetree, linux-kernel
On 22/01/2024 15:30, Odelu Kukatla wrote:
> Added clock property to enable clocks required for accessing
> qos registers.
Please use standard email subjects, so with the PATCH keyword in the
title. `git format-patch` helps here to create proper versioned patches.
Another useful tool is b4. Skipping the PATCH keyword makes filtering of
emails more difficult thus making the review process less convenient.
>
> Change-Id: Ie0478cc7ae9742742e2389cfa37ee57bab1aa320
Please run scripts/checkpatch.pl and fix reported warnings. Some
warnings can be ignored, but the code here looks like it needs a fix.
Feel free to get in touch if the warning is not clear.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [4/4] arm64: dts: qcom: sc7280: Add clocks for QOS configuration
2024-01-22 14:30 ` [4/4] arm64: dts: qcom: sc7280: Add clocks for QOS configuration Odelu Kukatla
@ 2024-01-22 17:43 ` Dmitry Baryshkov
2024-01-23 18:29 ` Konrad Dybcio
0 siblings, 1 reply; 5+ messages in thread
From: Dmitry Baryshkov @ 2024-01-22 17:43 UTC (permalink / raw)
To: Odelu Kukatla
Cc: georgi.djakov, cros-qcom-dts-watchers, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-msm, devicetree, linux-kernel
On Mon, 22 Jan 2024 at 16:39, Odelu Kukatla <quic_okukatla@quicinc.com> wrote:
>
> Add clock handles for required clocks to be enabled for
> configuring QoS on sc7280.
>
> Change-Id: I58991300ff1d8d2865763d4e79ee81c03586249e
> Signed-off-by: Odelu Kukatla <quic_okukatla@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 83b5b76ba179..73acf1bd0f97 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -2099,6 +2099,8 @@
> reg = <0 0x016e0000 0 0x1c080>;
> #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> + clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
> + <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
> };
>
> aggre2_noc: interconnect@1700000 {
> @@ -2106,6 +2108,7 @@
> compatible = "qcom,sc7280-aggre2-noc";
> #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> + clocks = <&rpmhcc RPMH_IPA_CLK>;
Is there any reason to write QoS for the IPA before the IPA starts
poking around? The same question applies to aggre1 NoC.
> };
>
> mmss_noc: interconnect@1740000 {
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [4/4] arm64: dts: qcom: sc7280: Add clocks for QOS configuration
2024-01-22 17:43 ` Dmitry Baryshkov
@ 2024-01-23 18:29 ` Konrad Dybcio
0 siblings, 0 replies; 5+ messages in thread
From: Konrad Dybcio @ 2024-01-23 18:29 UTC (permalink / raw)
To: Dmitry Baryshkov, Odelu Kukatla
Cc: georgi.djakov, cros-qcom-dts-watchers, Bjorn Andersson,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-arm-msm,
devicetree, linux-kernel
On 1/22/24 18:43, Dmitry Baryshkov wrote:
> On Mon, 22 Jan 2024 at 16:39, Odelu Kukatla <quic_okukatla@quicinc.com> wrote:
>>
>> Add clock handles for required clocks to be enabled for
>> configuring QoS on sc7280.
>>
>> Change-Id: I58991300ff1d8d2865763d4e79ee81c03586249e
>> Signed-off-by: Odelu Kukatla <quic_okukatla@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 83b5b76ba179..73acf1bd0f97 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -2099,6 +2099,8 @@
>> reg = <0 0x016e0000 0 0x1c080>;
>> #interconnect-cells = <2>;
>> qcom,bcm-voters = <&apps_bcm_voter>;
>> + clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
>> + <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
>> };
>>
>> aggre2_noc: interconnect@1700000 {
>> @@ -2106,6 +2108,7 @@
>> compatible = "qcom,sc7280-aggre2-noc";
>> #interconnect-cells = <2>;
>> qcom,bcm-voters = <&apps_bcm_voter>;
>> + clocks = <&rpmhcc RPMH_IPA_CLK>;
>
> Is there any reason to write QoS for the IPA before the IPA starts
> poking around? The same question applies to aggre1 NoC.
Yes, as the NIUs require a clock source which may or may not be
the peripheral's clock
Konrad
^ permalink raw reply [flat|nested] 5+ messages in thread
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[not found] <20240122143030.11904-1-quic_okukatla@quicinc.com>
2024-01-22 14:30 ` [3/4] dt-bindings: interconnect: Add clock property to enable QOS on SC7280 Odelu Kukatla
2024-01-22 14:47 ` Krzysztof Kozlowski
2024-01-22 14:30 ` [4/4] arm64: dts: qcom: sc7280: Add clocks for QOS configuration Odelu Kukatla
2024-01-22 17:43 ` Dmitry Baryshkov
2024-01-23 18:29 ` Konrad Dybcio
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