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Tue, 27 Oct 2026 05:59:23 -0700 (PDT) Received: from [10.218.49.202] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-198a249c331sm70037137c88.17.2026.10.27.05.59.16 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 27 Oct 2026 05:59:22 -0700 (PDT) Message-ID: <991e6b64-8741-4669-9bbf-e31eed788f42@oss.qualcomm.com> Date: Tue, 27 Oct 2026 18:29:13 +0530 X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/6] thermal: qcom: tsens: add hardware-bin trip-point filtering To: Konrad Dybcio , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jonathan Corbet , Shuah Khan , Randy Dunlap , Amit Kucheria , Thara Gopinath , Bjorn Andersson , Konrad Dybcio , Abel Vesa Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-arm-msm@vger.kernel.org, Amit Kucheria References: <20261002-thermal_bin-v1-0-5a29be7e8ec5@oss.qualcomm.com> <20261002-thermal_bin-v1-4-5a29be7e8ec5@oss.qualcomm.com> <7cd708de-a58e-47fd-acd4-0e37be77de92@oss.qualcomm.com> Content-Language: en-US From: Gaurav Kohli In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Info: AW1haW4tMjYxMDI3MDA1MSBTYWx0ZWRfXyJ3F0vdDATqf xOV1b9EPmZMk0aRDHT/G+7aCvgyXJ2qq6TK/rrwzbzHi7k8+3jEEplYiraeqiSIkBo0u8DME1t0 Um/LAqHwrrXhQaJfLr55nitp+Q6PgtU= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDI3MDA1MSBTYWx0ZWRfXyJv4muBq5Kjj zdxP6bU9rb9nrsMxDPWWPuu9g4GA2RwKXbk0KeaGc7mbwhj9XYOA2ehPNEMJyiq8Om2QpZevICh W/7Wa9N7L43zmA11qpDHGH7cLlLXoRngDPul3EE/Da6zsR4OILBy5c3WyFQVNazAWpCWXt88MeA MiHcKY4dmaHN2NAUyaUvA8eyz40PIPUPvsKqFpO/mSpnQfiGhDRgkIA+r4GVYZrRxLlqpvMyPyq 0oeh8/4onomYUCwh37p43wgptx43mpYq6GwzLAnw/1+b2K27cxi1KloG/En26+ljjrXDtettrGP Cs+lIxETe7wYVbmSutg9a2qYCfUWRO0UEPsjr3Hl1Xf+qpaYjzS/IHVWpuPi7FGYKH3K1ubHPmA wdFGlYSIByJyKvd69kRRmxuzOptN1Q7RoESFbdk97m2hR04jN3Cg6gOA34W60Z2XweKUGXMBuav xXqkzAzlyiYgVPJFl1w== X-Authority-Analysis: v=2.4 cv=PrkG/AM3 c=1 sm=1 tr=0 ts=6ae0a02c cx=c_pps a=Uww141gWH0fZj/3QKPojxA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=2QBr877Ud9-TTkl_dS0A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=PxkB5W3o20Ba91AHUih5:22 X-Proofpoint-ORIG-GUID: 66iCp5AaGIW_dY_6QIJkhn512elrGuM- X-Proofpoint-GUID: 66iCp5AaGIW_dY_6QIJkhn512elrGuM- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-27_02,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 priorityscore=1501 phishscore=0 suspectscore=0 impostorscore=0 clxscore=1015 adultscore=0 bulkscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610270051 On 10/26/2026 5:21 PM, Konrad Dybcio wrote: > On 10/23/26 12:01 PM, Gaurav Kohli wrote: >> >> >> On 10/22/2026 2:39 PM, Konrad Dybcio wrote: >>> On 10/2/26 12:46 PM, Gaurav Kohli wrote: >>>> From: Amit Kucheria >>>> >>>> Some Qualcomm SoCs are binned at manufacturing time and expose the bin >>>> in qfprom fuses.  The thermal core's supported_hw_bin mechanism filters >>>> trip points by hardware version; wire tsens up to feed it. >>> >>> [...] >>> >>>> +    /* Hardware-bin values for thermal-hw-bin matching in DT. */ >>>> +    const u32 hw_bin_std = 0x1; >>>> +    const u32 hw_bin_elevated = 0x2; >>>> + >>>> +    /* Higher thermal profile identification for qcm6490/sc7280 bins. */ >>>> +    const u32 tsens_chip_id0 = 0x197; >>>> +    const u32 tsens_chip_id1 = 0x198; >>>> +    const u32 tsens_chip_id2 = 0x20e; >>>> +    const u32 tsens_chip_id3 = 0x20f; >>>> +    const u8 tsens_feat_id2 = 0x2; >>>> +    const u8 tsens_feat_id3 = 0x3; >>>> +    const u8 tsens_feat_id4 = 0x4; >>> >>> Isn't that (also) exposed over SMEM? >> >> Thanks Konrad, for review. >> >> SMEM has related socinfo data, but there is no exported helper for the >> exact fields needed here, such as feat-id, which is also used as the bin >> value. > > Is that different to qcom_smem_get_feature_code()? Thanks for review. I am checking internally and will update with the exact difference from feat-id. My understanding is that qcom_smem_get_feature_code() returns the SMEM socinfo feature_code, while this code needs the QFPROM feat-id field from the JTAG ID fuse word. For this series, would prefer to keep the fuse-based path. The same binding is also used by the generic i-temp fuse bit for Hamoa/future targets, while the jtag-id/feat-id decoding remains only the Kodiak/QCM6490-specific callback. Please let me know if you are fine with this approach. > >> This jtag-id/feat-id decoding is Kodiak/QCM6490-specific, and the >> thermal-bin mapping needs both values. Other/future targets are expected >> to use only the generic i-temp fuse bit, like Hamoa. > > So there are variants of kodiak that ""incorrectly"" set the feat_id? No, Kodiak is not incorrectly setting it. Kodiak/QCM6490 does not use the generic i-temp bit for this thermal profile selection, it is using feat id only for high TJ profile. The i-temp path is for Hamoa/future targets where the thermal bin is exposed as single bit. > > Konrad