devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Jiaxin Yu <jiaxin.yu@mediatek.com>
To: Mark Brown <broonie@kernel.org>
Cc: <robh+dt@kernel.org>, <angelogioacchino.delregno@collabora.com>,
	<aaronyu@google.com>, <matthias.bgg@gmail.com>,
	<trevor.wu@mediatek.com>, <tzungbi@google.com>,
	<julianbraha@gmail.com>, <alsa-devel@alsa-project.org>,
	<devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: Re: [v4 13/18] ASoC: mediatek: mt8186: add platform driver
Date: Fri, 29 Apr 2022 18:07:52 +0800	[thread overview]
Message-ID: <99c329534a462b39d9b39ba04851318e7823e54c.camel@mediatek.com> (raw)
In-Reply-To: <YmqCORqp6nYuQJZf@sirena.org.uk>

On Thu, 2022-04-28 at 13:02 +0100, Mark Brown wrote:
> On Thu, Apr 28, 2022 at 05:33:50PM +0800, Jiaxin Yu wrote:
> > Add mt8186 platform and affiliated driver.
> > 
> > Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com>
> > ---
> >  sound/soc/mediatek/Kconfig                    |   44 +
> >  sound/soc/mediatek/Makefile                   |    1 +
> >  sound/soc/mediatek/mt8186/Makefile            |   22 +
> >  sound/soc/mediatek/mt8186/mt8186-afe-common.h |  235 ++
> >  .../soc/mediatek/mt8186/mt8186-afe-control.c  |  261 ++
> >  sound/soc/mediatek/mt8186/mt8186-afe-pcm.c    | 3005
> > +++++++++++++++++
> >  .../mediatek/mt8186/mt8186-interconnection.h  |   69 +
> >  .../soc/mediatek/mt8186/mt8186-misc-control.c |  294 ++
> >  .../mediatek/mt8186/mt8186-mt6366-common.c    |   59 +
> >  .../mediatek/mt8186/mt8186-mt6366-common.h    |   17 +
> >  sound/soc/mediatek/mt8186/mt8186-reg.h        | 2913
> > ++++++++++++++++
> >  11 files changed, 6920 insertions(+)
> 
> This looks mostly good though it is enormous so I might've missed
> some
> things.  The patch series is already very large but it might still be
> worth splitting this up a bit more, perhaps split the code and data
> tables/register definitions into separate patches?
> 
Yes, agree with you.

I will spit them into three patches:

PATCH 1: 
  - mt8186-reg.h
  - mt8186-interconnection.h
  - mt8186-misc-control.c

PATCH 2:
  - mt8186-mt6366-common.c
  - mt8186-mt6366-common.h

PATCH 3:
  - sound/soc/mediatek/Kconfig 
  - sound/soc/mediatek/Makefile
  - sound/soc/mediatek/mt8186/Makefile
  - sound/soc/mediatek/mt8186/mt8186-afe-common.h
  - .../soc/mediatek/mt8186/mt8186-afe-control.c
  - sound/soc/mediatek/mt8186/mt8186-afe-pcm.c

> A few relatively minor issues with the controls.
> 
> > +/* this order must match reg bit amp_div_ch1/2 */
> > +static const char * const mt8186_sgen_amp_str[] = {
> > +	"1/128", "1/64", "1/32", "1/16", "1/8", "1/4", "1/2", "1" };
> > +static const char * const mt8186_sgen_mute_str[] = {
> > +	"Off", "On"
> > +};
> 
> On/off controls should be normal Switch controls not enums so
> userspace
> can display things sensibly.
> 
> > +static int mt8186_sgen_set(struct snd_kcontrol *kcontrol,
> > +			   struct snd_ctl_elem_value *ucontrol)
> > +{
> > +	struct snd_soc_component *cmpnt =
> > snd_soc_kcontrol_component(kcontrol);
> > +	struct mtk_base_afe *afe =
> > snd_soc_component_get_drvdata(cmpnt);
> > +	struct mt8186_afe_private *afe_priv = afe->platform_priv;
> > +	struct soc_enum *e = (struct soc_enum *)kcontrol-
> > >private_value;
> > +	int mode;
> > +	int mode_idx;
> > +
> > +	if (ucontrol->value.enumerated.item[0] >= e->items)
> > +		return -EINVAL;
> 
> ...
> 
> > +				   0x3f << INNER_LOOP_BACK_MODE_SFT);
> > +	}
> > +
> > +	afe_priv->sgen_mode = mode;
> > +
> > +	return 0;
> > +}
> 
> This should return 1 if the value is different from the previous
> value
> so event generation works, please run mixer-test against a system
> using
> the driver to help spot issues like this.  The same issue applies to
> at
> least some of the other custom controls.
> 
Got it.

> > +static int mt8186_sgen_mute_set(struct snd_kcontrol *kcontrol,
> > +				struct snd_ctl_elem_value *ucontrol)
> > +{
> > +	struct snd_soc_component *cmpnt =
> > snd_soc_kcontrol_component(kcontrol);
> > +	struct mtk_base_afe *afe =
> > snd_soc_component_get_drvdata(cmpnt);
> > +	struct soc_enum *e = (struct soc_enum *)kcontrol-
> > >private_value;
> > +	int mute;
> > +
> > +	if (ucontrol->value.enumerated.item[0] >= e->items)
> > +		return -EINVAL;
> > +
> > +	mute = ucontrol->value.integer.value[0];
> > +
> > +	dev_dbg(afe->dev, "%s(), kcontrol name %s, mute %d\n",
> > +		__func__, kcontrol->id.name, mute);
> > +
> > +	if (strcmp(kcontrol->id.name, SGEN_MUTE_CH1_KCONTROL_NAME) ==
> > 0) {
> > +		regmap_update_bits(afe->regmap, AFE_SINEGEN_CON0,
> > +				   MUTE_SW_CH1_MASK_SFT,
> > +				   mute << MUTE_SW_CH1_SFT);
> > +	} else {
> > +		regmap_update_bits(afe->regmap, AFE_SINEGEN_CON0,
> > +				   MUTE_SW_CH2_MASK_SFT,
> > +				   mute << MUTE_SW_CH2_SFT);
> > +	}
> > +
> > +	return 0;
> > +}
> 
> I can't tell why some of these are done with custom code rather than
> using a normal SOC_SINGLE()?

Yes, it's better to use SOC_SINGLE. I will fix them in next version.

Thanks,
Jiaxin.yu


  reply	other threads:[~2022-04-29 10:08 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-28  9:33 [v4 00/18] ASoC: mediatek: Add support for MT8186 SoC Jiaxin Yu
2022-04-28  9:33 ` [v4 01/18] ASoC: mediatek: mt6366: support for mt6366 codec Jiaxin Yu
2022-04-28  9:33 ` [v4 02/18] dt-bindings: mediatek: mt6358: add new compatible for using mt6366 Jiaxin Yu
2022-04-28  9:33 ` [v4 03/18] ASoC: mediatek: mt8186: support audsys clock control Jiaxin Yu
2022-04-28  9:33 ` [v4 04/18] ASoC: mediatek: mt8186: support adda in platform driver Jiaxin Yu
2022-04-28  9:33 ` [v4 05/18] ASoC: mediatek: mt8186: support hostless " Jiaxin Yu
2022-04-28  9:33 ` [v4 06/18] ASoC: mediatek: mt8186: support hw gain " Jiaxin Yu
2022-04-28  9:33 ` [v4 07/18] ASoC: mediatek: mt8186: support i2s " Jiaxin Yu
2022-04-28 12:13   ` Mark Brown
2022-04-29  9:56     ` Jiaxin Yu
2022-04-28  9:33 ` [v4 08/18] ASoC: mediatek: mt8186: support pcm " Jiaxin Yu
2022-04-28  9:33 ` [v4 09/18] ASoC: mediatek: mt8186: support src " Jiaxin Yu
2022-04-28  9:33 ` [v4 10/18] ASoC: mediatek: mt8186: support tdm " Jiaxin Yu
2022-04-28  9:33 ` [v4 11/18] ASoC: mediatek: mt8186: support audio clock control " Jiaxin Yu
2022-04-28  9:33 ` [v4 12/18] ASoC: mediatek: mt8186: support gpio " Jiaxin Yu
2022-04-28  9:33 ` [v4 13/18] ASoC: mediatek: mt8186: add " Jiaxin Yu
2022-04-28 12:02   ` Mark Brown
2022-04-29 10:07     ` Jiaxin Yu [this message]
2022-04-28  9:33 ` [v4 14/18] dt-bindings: mediatek: mt8186: add audio afe document Jiaxin Yu
2022-05-03 19:29   ` Rob Herring
2022-04-28  9:33 ` [v4 15/18] ASoC: mediatek: mt8186: add machine driver with mt6366, da7219 and max98357 Jiaxin Yu
2022-04-28  9:33 ` [v4 16/18] dt-bindings: mediatek: mt8186: add mt8186-mt6366-da7219-max98357 document Jiaxin Yu
2022-04-28 12:17   ` Rob Herring
2022-04-28 14:31   ` Rob Herring
2022-04-29  9:40     ` Jiaxin Yu
2022-04-29 20:16       ` Rob Herring
2022-04-28  9:33 ` [v4 17/18] ASoC: mediatek: mt8186: add machine driver with mt6366, rt1019 and rt5682s Jiaxin Yu
2022-04-28  9:33 ` [v4 18/18] dt-bindings: mediatek: mt8186: add mt8186-mt6366-rt1019-rt5682s document Jiaxin Yu
2022-04-28 12:17   ` Rob Herring
2022-04-28 14:31   ` Rob Herring
2022-04-28 12:19 ` [v4 00/18] ASoC: mediatek: Add support for MT8186 SoC Mark Brown
2022-04-29  9:21   ` Jiaxin Yu
2022-04-29  8:47 ` Geert Uytterhoeven
2022-04-29  9:15   ` Jiaxin Yu
2022-04-29 12:49     ` Geert Uytterhoeven

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=99c329534a462b39d9b39ba04851318e7823e54c.camel@mediatek.com \
    --to=jiaxin.yu@mediatek.com \
    --cc=Project_Global_Chrome_Upstream_Group@mediatek.com \
    --cc=aaronyu@google.com \
    --cc=alsa-devel@alsa-project.org \
    --cc=angelogioacchino.delregno@collabora.com \
    --cc=broonie@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=julianbraha@gmail.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mediatek@lists.infradead.org \
    --cc=matthias.bgg@gmail.com \
    --cc=robh+dt@kernel.org \
    --cc=trevor.wu@mediatek.com \
    --cc=tzungbi@google.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).