* [PATCH 0/2] arm64: qcom: sa8775p: enable cpufreq
@ 2023-02-21 15:05 Bartosz Golaszewski
2023-02-21 15:05 ` [PATCH 1/2] dt-bindings: cpufreq: qcom-hw: add a compatible for sa8775p Bartosz Golaszewski
` (2 more replies)
0 siblings, 3 replies; 9+ messages in thread
From: Bartosz Golaszewski @ 2023-02-21 15:05 UTC (permalink / raw)
To: Rafael J . Wysocki, Viresh Kumar, Rob Herring,
Krzysztof Kozlowski, Andy Gross, Bjorn Andersson, Konrad Dybcio
Cc: linux-pm, devicetree, linux-kernel, linux-arm-msm,
Bartosz Golaszewski
From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Add the new compatible for the cpufreq engine on the sa8775p SoC and
enable it in the .dtsi.
Bartosz Golaszewski (2):
dt-bindings: cpufreq: qcom-hw: add a compatible for sa8775p
arm64: dts: qcom: sa8775p: add cpufreq node
.../bindings/cpufreq/cpufreq-qcom-hw.yaml | 1 +
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 21 +++++++++++++++++++
2 files changed, 22 insertions(+)
--
2.37.2
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 1/2] dt-bindings: cpufreq: qcom-hw: add a compatible for sa8775p 2023-02-21 15:05 [PATCH 0/2] arm64: qcom: sa8775p: enable cpufreq Bartosz Golaszewski @ 2023-02-21 15:05 ` Bartosz Golaszewski 2023-02-21 15:46 ` Krzysztof Kozlowski 2023-02-21 15:05 ` [PATCH 2/2] arm64: dts: qcom: sa8775p: add cpufreq node Bartosz Golaszewski 2023-03-15 23:34 ` (subset) [PATCH 0/2] arm64: qcom: sa8775p: enable cpufreq Bjorn Andersson 2 siblings, 1 reply; 9+ messages in thread From: Bartosz Golaszewski @ 2023-02-21 15:05 UTC (permalink / raw) To: Rafael J . Wysocki, Viresh Kumar, Rob Herring, Krzysztof Kozlowski, Andy Gross, Bjorn Andersson, Konrad Dybcio Cc: linux-pm, devicetree, linux-kernel, linux-arm-msm, Bartosz Golaszewski From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Add the compatible for the cpufreq engine present on sa8775p platforms. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> --- Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml index e4aa8c67d532..92693c33edf9 100644 --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml @@ -26,6 +26,7 @@ properties: items: - enum: - qcom,qdu1000-cpufreq-epss + - qcom,sa8775p-cpufreq-epss - qcom,sc7280-cpufreq-epss - qcom,sc8280xp-cpufreq-epss - qcom,sm6375-cpufreq-epss -- 2.37.2 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] dt-bindings: cpufreq: qcom-hw: add a compatible for sa8775p 2023-02-21 15:05 ` [PATCH 1/2] dt-bindings: cpufreq: qcom-hw: add a compatible for sa8775p Bartosz Golaszewski @ 2023-02-21 15:46 ` Krzysztof Kozlowski 2023-02-23 4:18 ` Viresh Kumar 0 siblings, 1 reply; 9+ messages in thread From: Krzysztof Kozlowski @ 2023-02-21 15:46 UTC (permalink / raw) To: Bartosz Golaszewski, Rafael J . Wysocki, Viresh Kumar, Rob Herring, Krzysztof Kozlowski, Andy Gross, Bjorn Andersson, Konrad Dybcio Cc: linux-pm, devicetree, linux-kernel, linux-arm-msm, Bartosz Golaszewski On 21/02/2023 16:05, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > Add the compatible for the cpufreq engine present on sa8775p platforms. > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > --- Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] dt-bindings: cpufreq: qcom-hw: add a compatible for sa8775p 2023-02-21 15:46 ` Krzysztof Kozlowski @ 2023-02-23 4:18 ` Viresh Kumar 0 siblings, 0 replies; 9+ messages in thread From: Viresh Kumar @ 2023-02-23 4:18 UTC (permalink / raw) To: Krzysztof Kozlowski Cc: Bartosz Golaszewski, Rafael J . Wysocki, Rob Herring, Krzysztof Kozlowski, Andy Gross, Bjorn Andersson, Konrad Dybcio, linux-pm, devicetree, linux-kernel, linux-arm-msm, Bartosz Golaszewski On 21-02-23, 16:46, Krzysztof Kozlowski wrote: > On 21/02/2023 16:05, Bartosz Golaszewski wrote: > > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > > > Add the compatible for the cpufreq engine present on sa8775p platforms. > > > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > --- > > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Applied. Thanks. -- viresh ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 2/2] arm64: dts: qcom: sa8775p: add cpufreq node 2023-02-21 15:05 [PATCH 0/2] arm64: qcom: sa8775p: enable cpufreq Bartosz Golaszewski 2023-02-21 15:05 ` [PATCH 1/2] dt-bindings: cpufreq: qcom-hw: add a compatible for sa8775p Bartosz Golaszewski @ 2023-02-21 15:05 ` Bartosz Golaszewski 2023-02-21 17:44 ` Konrad Dybcio 2023-03-06 13:34 ` Bartosz Golaszewski 2023-03-15 23:34 ` (subset) [PATCH 0/2] arm64: qcom: sa8775p: enable cpufreq Bjorn Andersson 2 siblings, 2 replies; 9+ messages in thread From: Bartosz Golaszewski @ 2023-02-21 15:05 UTC (permalink / raw) To: Rafael J . Wysocki, Viresh Kumar, Rob Herring, Krzysztof Kozlowski, Andy Gross, Bjorn Andersson, Konrad Dybcio Cc: linux-pm, devicetree, linux-kernel, linux-arm-msm, Bartosz Golaszewski From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Add a node for the cpufreq engine and specify the frequency domains for all CPUs. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index ce5976e36aee..5e2bc67b3178 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -37,6 +37,7 @@ CPU0: cpu@0 { compatible = "qcom,kryo"; reg = <0x0 0x0>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 0>; next-level-cache = <&L2_0>; L2_0: l2-cache { compatible = "cache"; @@ -52,6 +53,7 @@ CPU1: cpu@100 { compatible = "qcom,kryo"; reg = <0x0 0x100>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 0>; next-level-cache = <&L2_1>; L2_1: l2-cache { compatible = "cache"; @@ -64,6 +66,7 @@ CPU2: cpu@200 { compatible = "qcom,kryo"; reg = <0x0 0x200>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 0>; next-level-cache = <&L2_2>; L2_2: l2-cache { compatible = "cache"; @@ -76,6 +79,7 @@ CPU3: cpu@300 { compatible = "qcom,kryo"; reg = <0x0 0x300>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 0>; next-level-cache = <&L2_3>; L2_3: l2-cache { compatible = "cache"; @@ -88,6 +92,7 @@ CPU4: cpu@10000 { compatible = "qcom,kryo"; reg = <0x0 0x10000>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 1>; next-level-cache = <&L2_4>; L2_4: l2-cache { compatible = "cache"; @@ -104,6 +109,7 @@ CPU5: cpu@10100 { compatible = "qcom,kryo"; reg = <0x0 0x10100>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 1>; next-level-cache = <&L2_5>; L2_5: l2-cache { compatible = "cache"; @@ -116,6 +122,7 @@ CPU6: cpu@10200 { compatible = "qcom,kryo"; reg = <0x0 0x10200>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 1>; next-level-cache = <&L2_6>; L2_6: l2-cache { compatible = "cache"; @@ -128,6 +135,7 @@ CPU7: cpu@10300 { compatible = "qcom,kryo"; reg = <0x0 0x10300>; enable-method = "psci"; + qcom,freq-domain = <&cpufreq_hw 1>; next-level-cache = <&L2_7>; L2_7: l2-cache { compatible = "cache"; @@ -731,6 +739,19 @@ tcsr_mutex: hwlock@1f40000 { #hwlock-cells = <1>; }; + cpufreq_hw: cpufreq@18591000 { + compatible = "qcom,sa8775p-cpufreq-epss", + "qcom,cpufreq-epss"; + reg = <0x0 0x18591000 0x0 0x1000>, + <0x0 0x18593000 0x0 0x1000>; + reg-names = "freq-domain0", "freq-domain1"; + + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; + clock-names = "xo", "alternate"; + + #freq-domain-cells = <1>; + }; + tlmm: pinctrl@f000000 { compatible = "qcom,sa8775p-tlmm"; reg = <0x0 0xf000000 0x0 0x1000000>; -- 2.37.2 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] arm64: dts: qcom: sa8775p: add cpufreq node 2023-02-21 15:05 ` [PATCH 2/2] arm64: dts: qcom: sa8775p: add cpufreq node Bartosz Golaszewski @ 2023-02-21 17:44 ` Konrad Dybcio 2023-02-21 19:25 ` Bartosz Golaszewski 2023-03-06 13:34 ` Bartosz Golaszewski 1 sibling, 1 reply; 9+ messages in thread From: Konrad Dybcio @ 2023-02-21 17:44 UTC (permalink / raw) To: Bartosz Golaszewski, Rafael J . Wysocki, Viresh Kumar, Rob Herring, Krzysztof Kozlowski, Andy Gross, Bjorn Andersson Cc: linux-pm, devicetree, linux-kernel, linux-arm-msm, Bartosz Golaszewski On 21.02.2023 16:05, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > Add a node for the cpufreq engine and specify the frequency domains for > all CPUs. > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > --- > arch/arm64/boot/dts/qcom/sa8775p.dtsi | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > index ce5976e36aee..5e2bc67b3178 100644 > --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi > +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > @@ -37,6 +37,7 @@ CPU0: cpu@0 { > compatible = "qcom,kryo"; > reg = <0x0 0x0>; > enable-method = "psci"; > + qcom,freq-domain = <&cpufreq_hw 0>; > next-level-cache = <&L2_0>; > L2_0: l2-cache { > compatible = "cache"; > @@ -52,6 +53,7 @@ CPU1: cpu@100 { > compatible = "qcom,kryo"; > reg = <0x0 0x100>; > enable-method = "psci"; > + qcom,freq-domain = <&cpufreq_hw 0>; > next-level-cache = <&L2_1>; > L2_1: l2-cache { > compatible = "cache"; > @@ -64,6 +66,7 @@ CPU2: cpu@200 { > compatible = "qcom,kryo"; > reg = <0x0 0x200>; > enable-method = "psci"; > + qcom,freq-domain = <&cpufreq_hw 0>; > next-level-cache = <&L2_2>; > L2_2: l2-cache { > compatible = "cache"; > @@ -76,6 +79,7 @@ CPU3: cpu@300 { > compatible = "qcom,kryo"; > reg = <0x0 0x300>; > enable-method = "psci"; > + qcom,freq-domain = <&cpufreq_hw 0>; > next-level-cache = <&L2_3>; > L2_3: l2-cache { > compatible = "cache"; > @@ -88,6 +92,7 @@ CPU4: cpu@10000 { > compatible = "qcom,kryo"; > reg = <0x0 0x10000>; > enable-method = "psci"; > + qcom,freq-domain = <&cpufreq_hw 1>; > next-level-cache = <&L2_4>; > L2_4: l2-cache { > compatible = "cache"; > @@ -104,6 +109,7 @@ CPU5: cpu@10100 { > compatible = "qcom,kryo"; > reg = <0x0 0x10100>; > enable-method = "psci"; > + qcom,freq-domain = <&cpufreq_hw 1>; > next-level-cache = <&L2_5>; > L2_5: l2-cache { > compatible = "cache"; > @@ -116,6 +122,7 @@ CPU6: cpu@10200 { > compatible = "qcom,kryo"; > reg = <0x0 0x10200>; > enable-method = "psci"; > + qcom,freq-domain = <&cpufreq_hw 1>; > next-level-cache = <&L2_6>; > L2_6: l2-cache { > compatible = "cache"; > @@ -128,6 +135,7 @@ CPU7: cpu@10300 { > compatible = "qcom,kryo"; > reg = <0x0 0x10300>; > enable-method = "psci"; > + qcom,freq-domain = <&cpufreq_hw 1>; > next-level-cache = <&L2_7>; > L2_7: l2-cache { > compatible = "cache"; > @@ -731,6 +739,19 @@ tcsr_mutex: hwlock@1f40000 { > #hwlock-cells = <1>; > }; > > + cpufreq_hw: cpufreq@18591000 { > + compatible = "qcom,sa8775p-cpufreq-epss", > + "qcom,cpufreq-epss"; That's some very aggressive wrapping! :P Nevertheless, Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > + reg = <0x0 0x18591000 0x0 0x1000>, > + <0x0 0x18593000 0x0 0x1000>; > + reg-names = "freq-domain0", "freq-domain1"; > + > + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; > + clock-names = "xo", "alternate"; > + > + #freq-domain-cells = <1>; > + }; > + > tlmm: pinctrl@f000000 { > compatible = "qcom,sa8775p-tlmm"; > reg = <0x0 0xf000000 0x0 0x1000000>; ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] arm64: dts: qcom: sa8775p: add cpufreq node 2023-02-21 17:44 ` Konrad Dybcio @ 2023-02-21 19:25 ` Bartosz Golaszewski 0 siblings, 0 replies; 9+ messages in thread From: Bartosz Golaszewski @ 2023-02-21 19:25 UTC (permalink / raw) To: Konrad Dybcio Cc: Rafael J . Wysocki, Viresh Kumar, Rob Herring, Krzysztof Kozlowski, Andy Gross, Bjorn Andersson, linux-pm, devicetree, linux-kernel, linux-arm-msm, Bartosz Golaszewski On Tue, Feb 21, 2023 at 6:44 PM Konrad Dybcio <konrad.dybcio@linaro.org> wrote: > > > > On 21.02.2023 16:05, Bartosz Golaszewski wrote: > > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > > > Add a node for the cpufreq engine and specify the frequency domains for > > all CPUs. > > > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > --- > > arch/arm64/boot/dts/qcom/sa8775p.dtsi | 21 +++++++++++++++++++++ > > 1 file changed, 21 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > > index ce5976e36aee..5e2bc67b3178 100644 > > --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > > @@ -37,6 +37,7 @@ CPU0: cpu@0 { > > compatible = "qcom,kryo"; > > reg = <0x0 0x0>; > > enable-method = "psci"; > > + qcom,freq-domain = <&cpufreq_hw 0>; > > next-level-cache = <&L2_0>; > > L2_0: l2-cache { > > compatible = "cache"; > > @@ -52,6 +53,7 @@ CPU1: cpu@100 { > > compatible = "qcom,kryo"; > > reg = <0x0 0x100>; > > enable-method = "psci"; > > + qcom,freq-domain = <&cpufreq_hw 0>; > > next-level-cache = <&L2_1>; > > L2_1: l2-cache { > > compatible = "cache"; > > @@ -64,6 +66,7 @@ CPU2: cpu@200 { > > compatible = "qcom,kryo"; > > reg = <0x0 0x200>; > > enable-method = "psci"; > > + qcom,freq-domain = <&cpufreq_hw 0>; > > next-level-cache = <&L2_2>; > > L2_2: l2-cache { > > compatible = "cache"; > > @@ -76,6 +79,7 @@ CPU3: cpu@300 { > > compatible = "qcom,kryo"; > > reg = <0x0 0x300>; > > enable-method = "psci"; > > + qcom,freq-domain = <&cpufreq_hw 0>; > > next-level-cache = <&L2_3>; > > L2_3: l2-cache { > > compatible = "cache"; > > @@ -88,6 +92,7 @@ CPU4: cpu@10000 { > > compatible = "qcom,kryo"; > > reg = <0x0 0x10000>; > > enable-method = "psci"; > > + qcom,freq-domain = <&cpufreq_hw 1>; > > next-level-cache = <&L2_4>; > > L2_4: l2-cache { > > compatible = "cache"; > > @@ -104,6 +109,7 @@ CPU5: cpu@10100 { > > compatible = "qcom,kryo"; > > reg = <0x0 0x10100>; > > enable-method = "psci"; > > + qcom,freq-domain = <&cpufreq_hw 1>; > > next-level-cache = <&L2_5>; > > L2_5: l2-cache { > > compatible = "cache"; > > @@ -116,6 +122,7 @@ CPU6: cpu@10200 { > > compatible = "qcom,kryo"; > > reg = <0x0 0x10200>; > > enable-method = "psci"; > > + qcom,freq-domain = <&cpufreq_hw 1>; > > next-level-cache = <&L2_6>; > > L2_6: l2-cache { > > compatible = "cache"; > > @@ -128,6 +135,7 @@ CPU7: cpu@10300 { > > compatible = "qcom,kryo"; > > reg = <0x0 0x10300>; > > enable-method = "psci"; > > + qcom,freq-domain = <&cpufreq_hw 1>; > > next-level-cache = <&L2_7>; > > L2_7: l2-cache { > > compatible = "cache"; > > @@ -731,6 +739,19 @@ tcsr_mutex: hwlock@1f40000 { > > #hwlock-cells = <1>; > > }; > > > > + cpufreq_hw: cpufreq@18591000 { > > + compatible = "qcom,sa8775p-cpufreq-epss", > > + "qcom,cpufreq-epss"; > That's some very aggressive wrapping! :P > For when all you have is vi on a 80-char wide terminal :D Bartosz > Nevertheless, > > Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> > > Konrad > > + reg = <0x0 0x18591000 0x0 0x1000>, > > + <0x0 0x18593000 0x0 0x1000>; > > + reg-names = "freq-domain0", "freq-domain1"; > > + > > + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; > > + clock-names = "xo", "alternate"; > > + > > + #freq-domain-cells = <1>; > > + }; > > + > > tlmm: pinctrl@f000000 { > > compatible = "qcom,sa8775p-tlmm"; > > reg = <0x0 0xf000000 0x0 0x1000000>; ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] arm64: dts: qcom: sa8775p: add cpufreq node 2023-02-21 15:05 ` [PATCH 2/2] arm64: dts: qcom: sa8775p: add cpufreq node Bartosz Golaszewski 2023-02-21 17:44 ` Konrad Dybcio @ 2023-03-06 13:34 ` Bartosz Golaszewski 1 sibling, 0 replies; 9+ messages in thread From: Bartosz Golaszewski @ 2023-03-06 13:34 UTC (permalink / raw) To: Bjorn Andersson Cc: linux-pm, Konrad Dybcio, Viresh Kumar, Rafael J . Wysocki, devicetree, linux-kernel, linux-arm-msm, Andy Gross, Krzysztof Kozlowski, Rob Herring, Bartosz Golaszewski On Tue, Feb 21, 2023 at 4:05 PM Bartosz Golaszewski <brgl@bgdev.pl> wrote: > > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > Add a node for the cpufreq engine and specify the frequency domains for > all CPUs. > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > --- Bjorn, Viresh picked up the dt-bindings, so this is the only thing left to go into the qcom tree. Bartosz ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: (subset) [PATCH 0/2] arm64: qcom: sa8775p: enable cpufreq 2023-02-21 15:05 [PATCH 0/2] arm64: qcom: sa8775p: enable cpufreq Bartosz Golaszewski 2023-02-21 15:05 ` [PATCH 1/2] dt-bindings: cpufreq: qcom-hw: add a compatible for sa8775p Bartosz Golaszewski 2023-02-21 15:05 ` [PATCH 2/2] arm64: dts: qcom: sa8775p: add cpufreq node Bartosz Golaszewski @ 2023-03-15 23:34 ` Bjorn Andersson 2 siblings, 0 replies; 9+ messages in thread From: Bjorn Andersson @ 2023-03-15 23:34 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Konrad Dybcio, Viresh Kumar, Rafael J . Wysocki, Bartosz Golaszewski, Andy Gross Cc: Bartosz Golaszewski, linux-arm-msm, linux-pm, devicetree, linux-kernel On Tue, 21 Feb 2023 16:05:41 +0100, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > Add the new compatible for the cpufreq engine on the sa8775p SoC and > enable it in the .dtsi. > > Bartosz Golaszewski (2): > dt-bindings: cpufreq: qcom-hw: add a compatible for sa8775p > arm64: dts: qcom: sa8775p: add cpufreq node > > [...] Applied, thanks! [2/2] arm64: dts: qcom: sa8775p: add cpufreq node commit: 5d793ff40692c9b3f88df1820a79ac8ae7d9c80b Best regards, -- Bjorn Andersson <andersson@kernel.org> ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2023-03-15 23:32 UTC | newest] Thread overview: 9+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-02-21 15:05 [PATCH 0/2] arm64: qcom: sa8775p: enable cpufreq Bartosz Golaszewski 2023-02-21 15:05 ` [PATCH 1/2] dt-bindings: cpufreq: qcom-hw: add a compatible for sa8775p Bartosz Golaszewski 2023-02-21 15:46 ` Krzysztof Kozlowski 2023-02-23 4:18 ` Viresh Kumar 2023-02-21 15:05 ` [PATCH 2/2] arm64: dts: qcom: sa8775p: add cpufreq node Bartosz Golaszewski 2023-02-21 17:44 ` Konrad Dybcio 2023-02-21 19:25 ` Bartosz Golaszewski 2023-03-06 13:34 ` Bartosz Golaszewski 2023-03-15 23:34 ` (subset) [PATCH 0/2] arm64: qcom: sa8775p: enable cpufreq Bjorn Andersson
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