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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Prabhakar <prabhakar.csengg@gmail.com>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Magnus Damm <magnus.damm@gmail.com>,
	linux-clk@vger.kernel.org
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org,
	Biju Das <biju.das.jz@bp.renesas.com>,
	Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH v3 1/3] dt-bindings: clock: renesas: Document RZ/V2H(P) SoC CPG
Date: Mon, 1 Jul 2024 15:23:37 +0200	[thread overview]
Message-ID: <9a6b0589-b401-49f2-aac1-ad00a90c4791@kernel.org> (raw)
In-Reply-To: <20240627161315.98143-2-prabhakar.mahadev-lad.rj@bp.renesas.com>

On 27/06/2024 18:13, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> Document the device tree bindings for the Renesas RZ/V2H(P) SoC
> Clock Pulse Generator (CPG).
> 
> CPG block handles the below operations:
> - Generation and control of clock signals for the IP modules
> - Generation and control of resets
> - Control over booting
> - Low power consumption and power supply domains
> 
> Also define constants for the core clocks of the RZ/V2H(P) SoC. Note the
> core clocks are a subset of the ones which are listed as part of section
> 4.4.2 of HW manual Rev.1.01 which cannot be controlled by CLKON register.
> 
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof


  reply	other threads:[~2024-07-01 13:23 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-27 16:13 [PATCH v3 0/3] Add CPG support for RZ/V2H(P) SoC Prabhakar
2024-06-27 16:13 ` [PATCH v3 1/3] dt-bindings: clock: renesas: Document RZ/V2H(P) SoC CPG Prabhakar
2024-07-01 13:23   ` Krzysztof Kozlowski [this message]
2024-07-12 11:58   ` Geert Uytterhoeven
2024-07-12 13:47     ` Lad, Prabhakar
2024-06-27 16:13 ` [PATCH v3 2/3] clk: renesas: Add family-specific clock driver for RZ/V2H(P) Prabhakar
2024-07-12 11:59   ` Geert Uytterhoeven
2024-07-12 15:13     ` Lad, Prabhakar
2024-07-12 15:23       ` Geert Uytterhoeven
2024-07-12 15:28         ` Lad, Prabhakar
2024-07-12 17:11           ` Geert Uytterhoeven
2024-07-15  8:43             ` Lad, Prabhakar
2024-07-15  9:41               ` Geert Uytterhoeven
2024-07-15  9:55                 ` Lad, Prabhakar
2024-06-27 16:13 ` [PATCH v3 3/3] clk: renesas: Add RZ/V2H(P) CPG driver Prabhakar
2024-07-12 12:00   ` Geert Uytterhoeven
2024-07-12 15:14     ` Lad, Prabhakar

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