* [PATCH] arm64: dts: qcom: sm8350: correct SDHCI interconnect arguments
@ 2022-12-24 21:43 Krzysztof Kozlowski
2022-12-27 11:17 ` Konrad Dybcio
2022-12-29 17:23 ` Bjorn Andersson
0 siblings, 2 replies; 4+ messages in thread
From: Krzysztof Kozlowski @ 2022-12-24 21:43 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, linux-arm-msm, devicetree, linux-kernel
Cc: Krzysztof Kozlowski
The interconnect providers accept only one argument (cells == 1), so fix
a copy&paste from SM8450:
sm8350-hdk.dtb: mmc@8804000: interconnects: [[74, 9, 0], [75, 1, 0], [76, 2, 0], [77, 36, 0]] is too long
Fixes: 60477435e4de ("arm64: dts: qcom: sm8350: Add SDHCI2")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Fix for v6.2-rc merge window.
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 4fc15cc69b8c..0726930c9e28 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -2382,8 +2382,8 @@ sdhc_2: mmc@8804000 {
<&rpmhcc RPMH_CXO_CLK>;
clock-names = "iface", "core", "xo";
resets = <&gcc GCC_SDCC2_BCR>;
- interconnects = <&aggre2_noc MASTER_SDCC_2 0 &mc_virt SLAVE_EBI1 0>,
- <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_2 0>;
+ interconnects = <&aggre2_noc MASTER_SDCC_2 &mc_virt SLAVE_EBI1>,
+ <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_SDCC_2>;
interconnect-names = "sdhc-ddr","cpu-sdhc";
iommus = <&apps_smmu 0x4a0 0x0>;
power-domains = <&rpmhpd SM8350_CX>;
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH] arm64: dts: qcom: sm8350: correct SDHCI interconnect arguments
2022-12-24 21:43 [PATCH] arm64: dts: qcom: sm8350: correct SDHCI interconnect arguments Krzysztof Kozlowski
@ 2022-12-27 11:17 ` Konrad Dybcio
2022-12-29 16:51 ` Bjorn Andersson
2022-12-29 17:23 ` Bjorn Andersson
1 sibling, 1 reply; 4+ messages in thread
From: Konrad Dybcio @ 2022-12-27 11:17 UTC (permalink / raw)
To: Krzysztof Kozlowski, Andy Gross, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, linux-arm-msm, devicetree, linux-kernel
On 24.12.2022 22:43, Krzysztof Kozlowski wrote:
> The interconnect providers accept only one argument (cells == 1), so fix
> a copy&paste from SM8450:
>
> sm8350-hdk.dtb: mmc@8804000: interconnects: [[74, 9, 0], [75, 1, 0], [76, 2, 0], [77, 36, 0]] is too long
>
> Fixes: 60477435e4de ("arm64: dts: qcom: sm8350: Add SDHCI2")
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>
> ---
This patch is correct, but if 8350 dts mdss [1] gets merged, it will become
unnecessary, as it changes icc-cells to 2. Apply with caution i guess :D
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
[1] https://lore.kernel.org/linux-arm-msm/CAG3jFyuoXekXN48jAgXxLMy8yGAzK9oJH_1HHYAuRLBCzyordQ@mail.gmail.com/T/#mdd42dd600f0818ec103daa27c63add6700db86d3
>
> Fix for v6.2-rc merge window.
> ---
> arch/arm64/boot/dts/qcom/sm8350.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> index 4fc15cc69b8c..0726930c9e28 100644
> --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> @@ -2382,8 +2382,8 @@ sdhc_2: mmc@8804000 {
> <&rpmhcc RPMH_CXO_CLK>;
> clock-names = "iface", "core", "xo";
> resets = <&gcc GCC_SDCC2_BCR>;
> - interconnects = <&aggre2_noc MASTER_SDCC_2 0 &mc_virt SLAVE_EBI1 0>,
> - <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_2 0>;
> + interconnects = <&aggre2_noc MASTER_SDCC_2 &mc_virt SLAVE_EBI1>,
> + <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_SDCC_2>;
> interconnect-names = "sdhc-ddr","cpu-sdhc";
> iommus = <&apps_smmu 0x4a0 0x0>;
> power-domains = <&rpmhpd SM8350_CX>;
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] arm64: dts: qcom: sm8350: correct SDHCI interconnect arguments
2022-12-27 11:17 ` Konrad Dybcio
@ 2022-12-29 16:51 ` Bjorn Andersson
0 siblings, 0 replies; 4+ messages in thread
From: Bjorn Andersson @ 2022-12-29 16:51 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Krzysztof Kozlowski, Andy Gross, Rob Herring, Krzysztof Kozlowski,
linux-arm-msm, devicetree, linux-kernel
On Tue, Dec 27, 2022 at 12:17:22PM +0100, Konrad Dybcio wrote:
>
>
> On 24.12.2022 22:43, Krzysztof Kozlowski wrote:
> > The interconnect providers accept only one argument (cells == 1), so fix
> > a copy&paste from SM8450:
> >
> > sm8350-hdk.dtb: mmc@8804000: interconnects: [[74, 9, 0], [75, 1, 0], [76, 2, 0], [77, 36, 0]] is too long
> >
> > Fixes: 60477435e4de ("arm64: dts: qcom: sm8350: Add SDHCI2")
> > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> >
> > ---
> This patch is correct, but if 8350 dts mdss [1] gets merged, it will become
> unnecessary, as it changes icc-cells to 2. Apply with caution i guess :D
>
Seems reasonable to pick this fix for 6.2. Please help me remember to
check that [1] gets this right...
Thanks Krzysztof.
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Thanks,
Bjorn
>
> Konrad
>
> [1] https://lore.kernel.org/linux-arm-msm/CAG3jFyuoXekXN48jAgXxLMy8yGAzK9oJH_1HHYAuRLBCzyordQ@mail.gmail.com/T/#mdd42dd600f0818ec103daa27c63add6700db86d3
> >
> > Fix for v6.2-rc merge window.
> > ---
> > arch/arm64/boot/dts/qcom/sm8350.dtsi | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> > index 4fc15cc69b8c..0726930c9e28 100644
> > --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> > @@ -2382,8 +2382,8 @@ sdhc_2: mmc@8804000 {
> > <&rpmhcc RPMH_CXO_CLK>;
> > clock-names = "iface", "core", "xo";
> > resets = <&gcc GCC_SDCC2_BCR>;
> > - interconnects = <&aggre2_noc MASTER_SDCC_2 0 &mc_virt SLAVE_EBI1 0>,
> > - <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_2 0>;
> > + interconnects = <&aggre2_noc MASTER_SDCC_2 &mc_virt SLAVE_EBI1>,
> > + <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_SDCC_2>;
> > interconnect-names = "sdhc-ddr","cpu-sdhc";
> > iommus = <&apps_smmu 0x4a0 0x0>;
> > power-domains = <&rpmhpd SM8350_CX>;
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] arm64: dts: qcom: sm8350: correct SDHCI interconnect arguments
2022-12-24 21:43 [PATCH] arm64: dts: qcom: sm8350: correct SDHCI interconnect arguments Krzysztof Kozlowski
2022-12-27 11:17 ` Konrad Dybcio
@ 2022-12-29 17:23 ` Bjorn Andersson
1 sibling, 0 replies; 4+ messages in thread
From: Bjorn Andersson @ 2022-12-29 17:23 UTC (permalink / raw)
To: agross, Krzysztof Kozlowski, linux-arm-msm, robh+dt,
krzysztof.kozlowski+dt, linux-kernel, konrad.dybcio, devicetree
On Sat, 24 Dec 2022 22:43:51 +0100, Krzysztof Kozlowski wrote:
> The interconnect providers accept only one argument (cells == 1), so fix
> a copy&paste from SM8450:
>
> sm8350-hdk.dtb: mmc@8804000: interconnects: [[74, 9, 0], [75, 1, 0], [76, 2, 0], [77, 36, 0]] is too long
>
>
Applied, thanks!
[1/1] arm64: dts: qcom: sm8350: correct SDHCI interconnect arguments
commit: 74b91a1bdb994dfaed0074154ca7d493aeb735a6
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
^ permalink raw reply [flat|nested] 4+ messages in thread
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2022-12-24 21:43 [PATCH] arm64: dts: qcom: sm8350: correct SDHCI interconnect arguments Krzysztof Kozlowski
2022-12-27 11:17 ` Konrad Dybcio
2022-12-29 16:51 ` Bjorn Andersson
2022-12-29 17:23 ` Bjorn Andersson
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