From: Krzysztof Kozlowski <krzk@kernel.org>
To: Taniya Das <quic_tdas@quicinc.com>,
Bjorn Andersson <andersson@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
quic_imrashai@quicinc.com, quic_jkona@quicinc.com
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/5] clk: qcom: lpassaudiocc-sc7280: Add support for LPASS resets for QCM6490
Date: Mon, 16 Sep 2024 10:33:21 +0200 [thread overview]
Message-ID: <9b3350ba-eafe-4bb0-a6cc-f1b0a06d623e@kernel.org> (raw)
In-Reply-To: <936f151e-6951-4dea-95ed-35374ab249cf@quicinc.com>
On 13/09/2024 07:31, Taniya Das wrote:
>
>
> On 8/17/2024 2:55 PM, Krzysztof Kozlowski wrote:
>> On 16/08/2024 10:32, Taniya Das wrote:
>>> On the QCM6490 boards the LPASS firmware controls the complete clock
>>> controller functionalities. But the LPASS resets are required to be
>>> controlled from the high level OS. The Audio SW driver should be able to
>>> assert/deassert the audio resets as required. Thus in clock driver add
>>> support for the resets.
>>>
>>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
>>> ---
>>> drivers/clk/qcom/lpassaudiocc-sc7280.c | 23 +++++++++++++++++++----
>>> 1 file changed, 19 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/drivers/clk/qcom/lpassaudiocc-sc7280.c b/drivers/clk/qcom/lpassaudiocc-sc7280.c
>>> index 45e726477086..b64393089263 100644
>>> --- a/drivers/clk/qcom/lpassaudiocc-sc7280.c
>>> +++ b/drivers/clk/qcom/lpassaudiocc-sc7280.c
>>> @@ -1,6 +1,7 @@
>>> // SPDX-License-Identifier: GPL-2.0-only
>>> /*
>>> * Copyright (c) 2021, The Linux Foundation. All rights reserved.
>>> + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
>>> */
>>>
>>> #include <linux/clk-provider.h>
>>> @@ -713,14 +714,24 @@ static const struct qcom_reset_map lpass_audio_cc_sc7280_resets[] = {
>>> [LPASS_AUDIO_SWR_WSA_CGCR] = { 0xb0, 1 },
>>> };
>>>
>>> +static const struct regmap_config lpass_audio_cc_sc7280_reset_regmap_config = {
>>> + .name = "lpassaudio_cc_reset",
>>> + .reg_bits = 32,
>>> + .reg_stride = 4,
>>> + .val_bits = 32,
>>> + .fast_io = true,
>>> + .max_register = 0xc8,
>>> +};
>>> +
>>> static const struct qcom_cc_desc lpass_audio_cc_reset_sc7280_desc = {
>>> - .config = &lpass_audio_cc_sc7280_regmap_config,
>>> + .config = &lpass_audio_cc_sc7280_reset_regmap_config,
>>> .resets = lpass_audio_cc_sc7280_resets,
>>> .num_resets = ARRAY_SIZE(lpass_audio_cc_sc7280_resets),
>>> };
>>>
>>> static const struct of_device_id lpass_audio_cc_sc7280_match_table[] = {
>>> - { .compatible = "qcom,sc7280-lpassaudiocc" },
>>> + { .compatible = "qcom,qcm6490-lpassaudiocc", .data = &lpass_audio_cc_reset_sc7280_desc },
>>
>> That's odd to see sc7280 reset added for qcm6490, but not used fot
>> sc7280 at all. Didn't you mean here lpass_audio_cc_qcm6409_desc?
>>
>>
> The resets descriptor(lpass_audio_cc_reset_sc7280_desc) is not part of
> the global clock descriptor(lpass_cc_sc7280_desc) as these are part of
> different regmaps.
>
> On a non-QCM6490(SC7280) boards the resets are registered after the
> global descriptor is registered.
>
> But on QCM6490 board we need to register only the reset descriptor and
> no clocks are to be handled/registered and thus passed the match data
> for QCM6490 boards only.
Yeah, but why this is sc7280?
Best regards,
Krzysztof
next prev parent reply other threads:[~2024-09-16 8:33 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-16 8:32 [PATCH v2 0/5] Update LPASS Audio clock driver for QCM6490 board Taniya Das
2024-08-16 8:32 ` [PATCH v2 1/5] dt-bindings: clock: qcom: Add compatible for QCM6490 boards Taniya Das
2024-08-17 9:21 ` Krzysztof Kozlowski
2024-09-13 5:18 ` Taniya Das
2024-09-16 8:40 ` Krzysztof Kozlowski
2025-01-24 10:32 ` Taniya Das
2024-08-16 8:32 ` [PATCH v2 2/5] clk: qcom: lpassaudiocc-sc7280: Add support for LPASS resets for QCM6490 Taniya Das
2024-08-17 9:25 ` Krzysztof Kozlowski
2024-09-13 5:31 ` Taniya Das
2024-09-16 8:33 ` Krzysztof Kozlowski [this message]
2024-09-16 8:55 ` Dmitry Baryshkov
2024-09-16 9:03 ` Krzysztof Kozlowski
2025-01-24 10:32 ` Taniya Das
2024-08-16 8:32 ` [PATCH v2 3/5] arm64: dts: qcom: qcm6490-idp: Update protected clocks list Taniya Das
2024-08-16 8:32 ` [PATCH v2 4/5] arm64: dts: qcom: qcm6490-idp: Update the LPASS audio node Taniya Das
2024-08-16 8:32 ` [PATCH v2 5/5] arm64: dts: qcom: qcs6490-rb3gen2: " Taniya Das
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=9b3350ba-eafe-4bb0-a6cc-f1b0a06d623e@kernel.org \
--to=krzk@kernel.org \
--cc=andersson@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mturquette@baylibre.com \
--cc=quic_imrashai@quicinc.com \
--cc=quic_jkona@quicinc.com \
--cc=quic_tdas@quicinc.com \
--cc=robh@kernel.org \
--cc=sboyd@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).