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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8fc766531asm458063166b.50.2026.02.18.06.28.02 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 18 Feb 2026 06:28:03 -0800 (PST) Message-ID: <9b4cb352-d1ed-402d-a55d-cce2d2fe1eed@oss.qualcomm.com> Date: Wed, 18 Feb 2026 15:28:01 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/4] arm64: dts: qcom: sdm845: Add missing MDSS reset To: Dmitry Baryshkov Cc: David Heidelberg , Bjorn Andersson , Michael Turquette , Stephen Boyd , Ulf Hansson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20260217-sdm845-hdk-v1-0-866f1965fef7@oss.qualcomm.com> <20260217-sdm845-hdk-v1-3-866f1965fef7@oss.qualcomm.com> <590f75c2-6418-4d39-ba7e-589acdf98786@oss.qualcomm.com> <9405b67b-9e08-472d-a937-38c038fdf73a@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: HXSTjYRJrgeqPbrI3lZF7v5PIYvzl6oq X-Proofpoint-ORIG-GUID: HXSTjYRJrgeqPbrI3lZF7v5PIYvzl6oq X-Authority-Analysis: v=2.4 cv=eOweTXp1 c=1 sm=1 tr=0 ts=6995cc75 cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22 a=GgsMoib0sEa3-_RKJdDe:22 a=SXzkmgPmAAAA:8 a=VwQbUJbxAAAA:8 a=08J7RLiMzDJDz8dl29cA:9 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 a=EWLf6cg6Bh5aS0AxDgDu:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjE4MDExOSBTYWx0ZWRfX8jcDNJWgkzu3 HKpsun1mi2TFv1BR//yARL/xQm5hn1j4Uy1NUavEB9i1IZLnY2CXoH+Mcp5ZUAHlR/3GphR6z5S q1Yhd/1cP34jyFlPki9H8v0gbo63mc29d2O2FpGb7S2cj7Mo1bI3zCjXODehkZi/BNuRI8gtVfU GNBxyATYZDJby89d4snYS5bn1zcROMrmivCM2SbQzt/gsGNyVfYX0xiWfOgt5sCOJttCqXisBpq OIyafwlRZ3apAYzntR0nIpJa6k8Rtx1LMhaaPpuHjJUc4LtVzcadULeNJz+UsKV2uEOb1Ye5W1g PVv5dmemIa0HNazpUwZjBzBRet4HoFuZwDeKS731P2oNvoOxKi3x+PMdsJ+6kGaZTUtRvH4DRkK FARr52fTd1o1YGJSnmZeqAKNXmBWjDrpiOMQyeY1ZO3veyQ9Ip2Y/mWzMMhGy9KBGBjv8RzngHc rc9fN9voZoFUEyII8gQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-18_02,2026-02-16_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 adultscore=0 bulkscore=0 clxscore=1015 phishscore=0 malwarescore=0 priorityscore=1501 suspectscore=0 lowpriorityscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602180119 On 18-Feb-26 12:58, Dmitry Baryshkov wrote: > On Wed, Feb 18, 2026 at 12:24:26PM +0100, Konrad Dybcio wrote: >> On 2/18/26 12:18 PM, David Heidelberg wrote: >>> On 18/02/2026 11:30, Konrad Dybcio wrote: >>>> On 2/17/26 10:20 PM, Dmitry Baryshkov wrote: >>>>> From: David Heidelberg >>>>> >>>>> If the OS does not support recovering the state left by the >>>>> bootloader it needs a way to reset display hardware, so that it can >>>>> start from a clean state. Add a reference to the relevant reset. >>>> >>>> This is not the relevant reset >>>> >>>> You want MDSS_CORE_BCR @ 0xaf0_2000 >>> >>> Thanks, I prepared the fixes [1]. >>> >>> I'll try to test it if it's not breaking anything for us and send as v2 of [2]. >>> >>> David >>> >>> [1] https://codeberg.org/sdm845/linux/commits/branch/b4/mdss-reset >>> [2] https://patchwork.kernel.org/project/linux-arm-msm/patch/20260112-mdss-reset-v1-1-af7c572204d3@ixit.cz/ >> >> Please don't alter the contents of dt-bindings, it really doesn't matter >> if on sdm845 it's reset0 or reset1, that's why we define them in the first >> place > > I dpn't think that will pass. Current reset is defined as RSCC, we can't > change that to CORE behind the scene. I'd prefer David's approach. Back when I replied, David had a patch that removed the current RSCC reset definition in dt-bindings (at index 0) and re-used that index for CORE, putting RSCC at index 1. Perhaps it's better to link to specific commits when making comments, note to self :P Konrad