From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from sendmail.purelymail.com (sendmail.purelymail.com [34.202.193.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9F9A7214813 for ; Tue, 5 May 2026 04:21:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=34.202.193.197 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777954906; cv=none; b=Ae5vjiMj/7xK9VAV7tmGoc1v/q3fKceLnnSDidY5dWoB2DgyVL5pd7I6icU9oMAuRX9ziekDD7xVVhc9980y8nYsKmPuLEeZVW0shkHxN/HWL9JcA5aQGn63OPzCRQvBfx/dnn5czEd3prwx+iNaLsb5to+ezhQ1Gnu6K1I6Vag= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777954906; c=relaxed/simple; bh=rsbtrwoNteIeG4Ft1aA7m24bGGBadiqhJUwN9fwPGzA=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=d+257kZ5rpjJ7ECMsVQEBiZV6kMi9Oed+L+7ny719D3gCreat4qBff8hU/CP6+TGigFQkiQI/aGT1gMmiS0Izc/NIK/r5JcGZR8AAJ0ypN7tFkji65P4ACggBjCTqGNan1UNTifdfA4UDPPHSiby45hy6KyzQDktYL2p692nAos= ARC-Authentication-Results:i=1; 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s=purelymail3; d=q-lab.dev; v=1; bh=rsbtrwoNteIeG4Ft1aA7m24bGGBadiqhJUwN9fwPGzA=; h=Received:Date:Subject:To:From; DKIM-Signature: a=rsa-sha256; b=G8N2TVBpRdlKrvfoFlpLUGmRKiThzebKH/CWFyqWJL4e+f8RRpa6WckXXpqG42+yjVNKeTH74t7zQFyB/D5o/dQsvDgI9VxpnIccTODuQx/VCKcMU1TBbutAkXa6+8wIkPUSOWMXHgj1NVH4IuJ3+hXe1lsc8HUJo02+C7BguJRwlfdFHGPGj9J0G/ukBOQ51O0vlVSYG9eUqoYdHEGX2hnh9rn3OuwKYf01QhqNJkyxb5Co798U5tTKED05QEf7xztSMIeUFu0j2oD6yB32HtF3M4PyhBOpWlA86sQ+csypNRv4tTypEKkczaNasdDFCIDwdx/knXo5H7mpsO9DNQ==; s=purelymail3; d=purelymail.com; v=1; bh=rsbtrwoNteIeG4Ft1aA7m24bGGBadiqhJUwN9fwPGzA=; h=Feedback-ID:Received:Date:Subject:To:From; Feedback-ID: 284201:25281:null:purelymail X-Pm-Original-To: devicetree@vger.kernel.org Received: by smtp.purelymail.com (Purelymail SMTP) with ESMTPSA id -864377277; (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384); Tue, 05 May 2026 04:21:29 +0000 (UTC) Message-ID: <9bda558f-8ddd-49e1-ac5f-1f64a37fefb7@q-lab.dev> Date: Mon, 4 May 2026 21:21:27 -0700 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Betterbird (Windows) Subject: Re: [RFC PATCH v3 2/2] media: i2c: Add onsemi AR0234 image sensor driver To: Alexander Shiyan , linux-media@vger.kernel.org Cc: Isaac Scott , Dave Stevenson , Dongcheng Yan , devicetree@vger.kernel.org, Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sakari Ailus , Hans Verkuil , Hans de Goede , Vladimir Zapolskiy , Mehdi Djait , Laurent Pinchart , Benjamin Mugnier , Bryan O'Donoghue , Jingjing Xiong , Svyatoslav Ryhel References: <20260306103614.3208182-1-eagle.alexander923@gmail.com> <20260306103614.3208182-3-eagle.alexander923@gmail.com> Content-Language: en-US From: Quentin Freimanis In-Reply-To: <20260306103614.3208182-3-eagle.alexander923@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Alexander, On 2026-03-06 2:36 a.m., Alexander Shiyan wrote: > +static int ar0234_identify_module(struct ar0234 *ar0234) > +{ > + u64 id, rev; > + int ret; > + > + ret = cci_read(ar0234->regmap, AR0234_REG_CHIP_VERSION, &id, NULL); > + ret = cci_read(ar0234->regmap, AR0234_REG_REVISION_NUMBER, &rev, &ret); > + if (ret) > + return dev_err_probe(ar0234->dev, ret, > + "Failed to read chip id\n"); > + > + if (id == AR0234_CHIP_ID_MONO) > + ar0234->variant = AR0234_VARIANT_MONO; > + else if (id == AR0234_CHIP_ID) > + ar0234->variant = AR0234_VARIANT_COLOUR; > + else > + return dev_err_probe(ar0234->dev, -ENODEV, > + "Invalid chip id: 0x%04x\n", (u16)id); > + > + dev_info(ar0234->dev, "Success reading chip id: 0x%04x, Rev.%lld\n", > + (u16)id, (rev >> 12) & 0xf); > + > + return ret; > +} > + > +static int ar0234_power_on(struct device *dev) > +{ > + struct v4l2_subdev *sd = dev_get_drvdata(dev); > + struct ar0234 *ar0234 = to_ar0234(sd); > + int ret; > + > + ret = regulator_bulk_enable(ARRAY_SIZE(ar0234->supplies), > + ar0234->supplies); > + if (ret) { > + dev_err(ar0234->dev, "Failed to enable regulators\n"); > + return ret; > + } > + > + ret = clk_prepare_enable(ar0234->clk); > + if (ret) { > + dev_err(ar0234->dev, "Failed to enable clock\n"); > + regulator_bulk_disable(ARRAY_SIZE(ar0234->supplies), > + ar0234->supplies); > + return ret; > + } > + > + gpiod_set_value_cansleep(ar0234->reset, 1); should be 0 to de-assert the reset pin to power on > + /* ~160000 EXTCLKs */ > + usleep_range(27000, 28000); > + > + return 0; > +} > + > +static int ar0234_power_off(struct device *dev) > +{ > + struct v4l2_subdev *sd = dev_get_drvdata(dev); > + struct ar0234 *ar0234 = to_ar0234(sd); > + > + gpiod_set_value_cansleep(ar0234->reset, 0); 1 to assert reset to power off > + regulator_bulk_disable(ARRAY_SIZE(ar0234->supplies), ar0234->supplies); > + clk_disable_unprepare(ar0234->clk); > + /* 100ms PwrDown until next PwrUp */ > + usleep_range(100000, 110000); > + > + return 0; > +} > + after fixing the reset polarity locally I got the driver working with a rgb ar0234cs in 4-lane 10bit mode using a 24mhz extclk and a 448MHz link frequency. Tested-by: Quentin Freimanis (after the reset fix) - Quentin