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[60.250.192.107]) by smtp.gmail.com with ESMTPSA id w1-20020a636201000000b005b32d6b4f2fsm53522pgb.81.2023.11.29.17.10.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 29 Nov 2023 17:10:48 -0800 (PST) Message-ID: <9c41e6d4-fe47-4e87-b0a7-f5ecaec720b3@gmail.com> Date: Thu, 30 Nov 2023 09:10:43 +0800 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/4] arm64: dts: nuvoton: Add pinctrl support for ma35d1 Content-Language: en-US To: Krzysztof Kozlowski , linus.walleij@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, p.zabel@pengutronix.de, j.neuschaefer@gmx.net Cc: linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, ychuang3@nuvoton.com, schung@nuvoton.com References: <20231128061118.575847-1-ychuang570808@gmail.com> <20231128061118.575847-4-ychuang570808@gmail.com> <7edda3ca-b98a-4125-979f-3ee7ac718a9a@linaro.org> <7fed5d90-da04-40fb-8677-b807b6f51cc9@linaro.org> <8663d26e-32b8-4f2b-b497-9efa7440f070@gmail.com> <2fab32e6-23a4-41bb-b47b-4f993fc590dc@linaro.org> <4b00c41c-7751-40ca-bf2d-53f1179772d4@gmail.com> <9ec2dd42-5173-40df-8e6b-9c09f2d77f67@linaro.org> <6d511cc4-f22c-4c8f-a1ea-a8d99be95157@gmail.com> From: Jacky Huang In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Dear Krzysztof, On 2023/11/29 下午 06:54, Krzysztof Kozlowski wrote: > On 29/11/2023 11:14, Jacky Huang wrote: >> Dear Krzysztof, >> >> >> On 2023/11/29 下午 06:02, Krzysztof Kozlowski wrote: >>> On 29/11/2023 10:41, Jacky Huang wrote: >>>> Dear Krzysztof, >>>> >>>> >>>> On 2023/11/29 下午 04:11, Krzysztof Kozlowski wrote: >>>>> On 29/11/2023 04:35, Jacky Huang wrote: >>>>>>>>> Best regards, >>>>>>>>> Krzysztof >>>>>>>>> >>>>>>>> Yes, it did pass the 'dtbs_check'. I guess the tool does not detect such >>>>>>>> issues. >>>>>>>> Anyway, I will fix it in the next version. >>>>>>> Hm, I see your bindings indeed allow pin-.* and unit addresses, so it is >>>>>>> the binding issue. >>>>>>> >>>>>>> The examples you used as reference - xlnx,zynqmp-pinctrl.yaml and >>>>>>> realtek,rtd1315e-pinctrl.yaml - do not mix these as you do. >>>>>>> >>>>>>> I don't understand why do you need them yet. I don't see any populate of >>>>>>> children. There are no compatibles, either. >>>>>>> >>>>>>> Which part of your driver uses them exactly? >>>>>>> >>>>>>> Best regards, >>>>>>> Krzysztof >>>>>>> >>>>>> I will move the 'pcfg_default: pin-default' from dtsi to dts, like this: >>>>>> >>>>>> &pinctrl { >>>>>>     pcfg_default: pin-default { >>>>>>         slew-rate = <0>; >>>>>>         input-schmitt-disable; >>>>>>         bias-disable; >>>>>>         power-source = <1>; >>>>>>         drive-strength = <17100>; >>>>>>     }; >>>>> This solves nothing. It's the same placement. >>>>> >>>>> >>>>> Best regards, >>>>> Krzysztof >>>>> >>>> OK, it stil be the binding issues. >>>> For "^pin-[a-z0-9]+$", I reference to the "pcfg-[a-z0-9-]+$" of >>>> rockchip,pinctrl.yaml. >>>> >>>> My intention is to describe a generic pin configuration, aiming to make >>>> the pin >>>> description more concise. In actual testing, it proves to be effective. >>> Can you instead respond to my actual questions? >>> >>> Best regards, >>> Krzysztof >>> >> The the last one item of nuvoton,pins is a phandle, which can refer to >> '&pin-default'. The following code of driver pinctrl-ma35.c parse >> "nuvoton,pins", including the node reference by phandle. list = >> of_get_property(np, "nuvoton,pins", &size); size /= sizeof(*list); if >> (!size || size % 4) { dev_err(npctl->dev, "wrong setting!\n"); return >> -EINVAL; } grp->npins = size / 4; grp->pins = devm_kzalloc(npctl->dev, >> grp->npins * sizeof(*grp->pins), GFP_KERNEL); if (!grp->pins) return >> -ENOMEM; pin = grp->settings = devm_kzalloc(npctl->dev, grp->npins * >> sizeof(*grp->settings), GFP_KERNEL); if (!grp->settings) return -ENOMEM; >> for (i = 0, j = 0; i < size; i += 4, j++) { struct device_node >> *np_config; const __be32 *phandle; pin->offset = be32_to_cpu(*list++) * >> MA35_MFP_REG_SZ_PER_BANK + MA35_MFP_REG_BASE; pin->shift = >> (be32_to_cpu(*list++) * MA35_MFP_BITS_PER_PORT) % 32; pin->muxval = >> be32_to_cpu(*list++); phandle = list++; if (!phandle) return -EINVAL; >> np_config = of_find_node_by_phandle(be32_to_cpup(phandle)); ret = >> pinconf_generic_parse_dt_config(np_config, NULL, &pin->configs, >> &pin->nconfigs); if (ret) return ret; grp->pins[j] = >> npctl->info->get_pin_num(pin->offset, pin->shift); pin++; } Best >> Regards, Jacky Huang > Sorry, I cannot parse it. > > I was referring to the children with unit addresses. I don't see any > populate of the children, so why do you need them? > > There are no compatibles, either. > > Which part of your driver uses them exactly? > > Best regards, > Krzysztof > So, I should update the binding from "^pin-[a-z0-9]+$" to something like "-pincfg$". Just remove the unit address part, and it will become:     default-pincfg {         slew-rate = <0>;         input-schmitt-disable;         bias-disable;         power-source = <1>;         drive-strength = <17100>;     }; Best Regards, Jacky Huang