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From: Gatien CHEVALLIER <gatien.chevallier@foss.st.com>
To: "Russell King (Oracle)" <linux@armlinux.org.uk>,
	Andrew Lunn <andrew@lunn.ch>
Cc: Krzysztof Kozlowski <krzk@kernel.org>,
	Andrew Lunn <andrew+netdev@lunn.ch>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	Christophe Roullier <christophe.roullier@foss.st.com>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	Simon Horman <horms@kernel.org>,
	Tristram Ha <Tristram.Ha@microchip.com>,
	Florian Fainelli <florian.fainelli@broadcom.com>,
	<netdev@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-stm32@st-md-mailman.stormreply.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH net-next 1/4] dt-bindings: net: document st,phy-wol property
Date: Wed, 23 Jul 2025 10:53:55 +0200	[thread overview]
Message-ID: <9c9499e3-10c9-4245-938a-65831fe10c05@foss.st.com> (raw)
In-Reply-To: <5a2e0cd8-6d20-4f5a-a3a0-9010305509e3@foss.st.com>



On 7/23/25 10:50, Gatien CHEVALLIER wrote:
> 
> 
> On 7/22/25 22:20, Russell King (Oracle) wrote:
>> On Tue, Jul 22, 2025 at 03:40:16PM +0200, Andrew Lunn wrote:
>>> I know Russell has also replied about issues with stmmac. Please
>>> consider that when reading what i say... It might be not applicable.
>>>
>>>> Seems like a fair and logical approach. It seems reasonable that the
>>>> MAC driver relies on the get_wol() API to know what's supported.
>>>>
>>>> The tricky thing for the PHY used in this patchset is to get this
>>>> information:
>>>>
>>>> Extract from the documentation of the LAN8742A PHY:
>>>> "The WoL detection can be configured to assert the nINT interrupt pin
>>>> or nPME pin"
>>>
>>> https://www.kernel.org/doc/Documentation/devicetree/bindings/power/wakeup-source.txt
>>>
>>> It is a bit messy, but in the device tree, you could have:
>>>
>>>      interrupts = <&sirq 0 IRQ_TYPE_LEVEL_LOW>
>>>                   <&pmic 42 IRQ_TYPE_LEVEL_LOW>;
>>>      interrupt-names = "nINT", "wake";
>>>      wakeup-source
>>>
>>> You could also have:
>>>
>>>      interrupts = <&sirq 0 IRQ_TYPE_LEVEL_LOW>;
>>>      interrupt-names = "wake";
>>>      wakeup-source
>>>
>>> In the first example, since there are two interrupts listed, it must
>>> be using the nPME. For the second, since there is only one, it must be
>>> using nINT.
>>>
>>> Where this does not work so well is when you have a board which does
>>> not have nINT wired, but does have nPME. The phylib core will see
>>> there is an interrupt and request it, and disable polling. And then
>>> nothing will work. We might be able to delay solving that until such a
>>> board actually exists?
>>
>> (Officially, I'm still on vacation...)
>>
>> At this point, I'd like to kick off a discussion about PHY-based
>> wakeup that is relevant to this thread.
>>
>> The kernel has device-based wakeup support. We have:
>>
>> - device_set_wakeup_capable(dev, flag) - indicates that the is
>>    capable of waking the system depending on the flag.
>>
>> - device_set_wakeup_enable(dev, flag) - indicates whether "dev"
>>    has had wake-up enabled or disabled depending on the flag.
>>
>> - dev*_pm_set_wake_irq(dev, irq) - indicates to the wake core that
>>    the indicated IRQ is capable of waking the system, and the core
>>    will handle enabling/disabling irq wake capabilities on the IRQ
>>    as appropriate (dependent on device_set_wakeup_enable()). Other
>>    functions are available for wakeup IRQs that are dedicated to
>>    only waking up the system (e.g. the WOL_INT pin on AR8031).
>>
>> Issue 1. In stmmac_init_phy(), we have this code:
>>
>>          if (!priv->plat->pmt) {
>>                  struct ethtool_wolinfo wol = { .cmd = ETHTOOL_GWOL };
>>
>>                  phylink_ethtool_get_wol(priv->phylink, &wol);
>>                  device_set_wakeup_capable(priv->device, 
>> !!wol.supported);
>>                  device_set_wakeup_enable(priv->device, !!wol.wolopts);
>>          }
>>
>> This reads the WoL state from the PHY (a different struct device)
>> and sets the wakeup capability and enable state for the _stmmac_
>> device accordingly, but in the case of PHY based WoL, it's the PHY
>> doing the wakeup, not the MAC. So this seems wrong on the face of
>> it.
> 
> 2 cents: Maybe even remove in stmmac_set_wol() if !priv->plat->pmt.
> 

Sorry, that's not very clear. I was thinking of removing:
device_set_wakeup_enable(priv->device, !!wol->wolopts); in
stmmac_set_wol()

>>
>> Issue 2. no driver in phylib, nor the core, ever uses any of the
>> device_set_wakeup_*() functions. As PHYs on their own are capable
>> of WoL, isn't this an oversight? Shouldn't phylib be supporting
>> this rather than leaving it to MAC drivers to figure something out?
>>
>> Issue 3. should pins like WOL_INT or nPME be represented as an
>> interrupt, and dev_pm_set_dedicated_wake_irq() used to manage that
>> interrupt signal if listed as an IRQ in the PHY's DT description?
>>
>> (Side note: I have tried WoL on the Jetson Xavier NX board I have
>> which uses stmmac-based WoL, but it seems non-functional. I've
>> dropped a private email to Jon and Thierry to see whether this is
>> expected or something that needs fixing. I'm intending to convert
>> stmmac to use core wakeirq support, rather than managing
>> the enable_irq_wake()/disable_irq_wake() by itself.)
>>

  reply	other threads:[~2025-07-23  8:57 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-21 11:14 [PATCH net-next 0/4] net: add WoL from PHY support for stm32mp135f-dk Gatien Chevallier
2025-07-21 11:14 ` [PATCH net-next 1/4] dt-bindings: net: document st,phy-wol property Gatien Chevallier
2025-07-21 11:30   ` Krzysztof Kozlowski
2025-07-21 12:10     ` Gatien CHEVALLIER
2025-07-21 12:16       ` Krzysztof Kozlowski
2025-07-21 12:54         ` Gatien CHEVALLIER
2025-07-21 13:18       ` Andrew Lunn
2025-07-21 15:56         ` Gatien CHEVALLIER
2025-07-21 17:07           ` Andrew Lunn
2025-07-21 18:08             ` Florian Fainelli
2025-07-22  9:08             ` Gatien CHEVALLIER
2025-07-22 13:40               ` Andrew Lunn
2025-07-22 20:20                 ` Russell King (Oracle)
2025-07-22 20:30                   ` Florian Fainelli
2025-07-22 20:59                   ` Andrew Lunn
2025-07-22 21:39                     ` Russell King (Oracle)
2025-07-22 22:00                       ` Russell King (Oracle)
2025-07-22 22:57                         ` Russell King (Oracle)
2025-07-23 14:02                         ` Andrew Lunn
2025-07-23 14:23                       ` Andrew Lunn
2025-07-23 18:13                         ` Florian Fainelli
2025-07-23  8:50                   ` Gatien CHEVALLIER
2025-07-23  8:53                     ` Gatien CHEVALLIER [this message]
2025-07-23  9:25                       ` Russell King (Oracle)
2025-07-23  9:20                     ` Russell King (Oracle)
2025-07-23 14:35                       ` Gatien CHEVALLIER
2025-07-22  9:13             ` Russell King (Oracle)
2025-07-22  7:32           ` Russell King (Oracle)
2025-07-22  9:10             ` Gatien CHEVALLIER
2025-07-21 11:14 ` [PATCH net-next 2/4] net: stmmac: stm32: add WoL from PHY support Gatien Chevallier
2025-07-21 11:14 ` [PATCH net-next 3/4] net: phy: smsc: fix and improve WoL support Gatien Chevallier
2025-07-21 11:28   ` Russell King (Oracle)
2025-07-21 12:23     ` Gatien CHEVALLIER
2025-07-21 13:26   ` Andrew Lunn
2025-07-21 14:19     ` Gatien CHEVALLIER
2025-07-21 14:23       ` Andrew Lunn
2025-07-21 11:14 ` [PATCH net-next 4/4] arm: dts: st: activate ETH1 WoL from PHY on stm32mp135f-dk Gatien Chevallier

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