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From: Matthias Brugger <matthias.bgg@gmail.com>
To: Hsin-Yi Wang <hsinyi@chromium.org>, linux-mediatek@lists.infradead.org
Cc: Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Enric Balletbo i Serra <enric.balletbo@collabora.com>,
	Eddie Huang <eddie.huang@mediatek.com>
Subject: Re: [PATCH v2 1/2] arm64: dts: mt8173: Set uart to mmio32 iotype
Date: Thu, 10 Sep 2020 12:25:21 +0200	[thread overview]
Message-ID: <9ca1b7c0-9fec-27b7-ae08-c00613c3004c@gmail.com> (raw)
In-Reply-To: <20200910084304.3429494-1-hsinyi@chromium.org>

Hi,

On 10/09/2020 10:43, Hsin-Yi Wang wrote:
> Set uart iotype to mmio32 to make earlycon work with stdout-path.
> 
> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
> ---
>   arch/arm64/boot/dts/mediatek/mt8173.dtsi | 8 ++++++++
>   1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> index 5e046f9d48ce9..ca6ea71f5f435 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> @@ -613,6 +613,8 @@ uart0: serial@11002000 {
>   			interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_LOW>;
>   			clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
>   			clock-names = "baud", "bus";
> +			reg-io-width = <4>;

Why do we need that, we have
device->port.iotype = UPIO_MEM32;
in early_mtk8250_setup(). That should do the job already.


> +			reg-shift = <2>;

Can't we just add
device->port.regshift = 2;
to early_mtk8250_setup()? I think that would be a cleaner solution. As the 
serial device is the same for all SoCs, I don't expect any regression here.

CCing Eddie to correct me, if I'm wrong :)

Regards,
Matthias

>   			status = "disabled";
>   		};
>   
> @@ -623,6 +625,8 @@ uart1: serial@11003000 {
>   			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>;
>   			clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>;
>   			clock-names = "baud", "bus";
> +			reg-io-width = <4>;
> +			reg-shift = <2>;
>   			status = "disabled";
>   		};
>   
> @@ -633,6 +637,8 @@ uart2: serial@11004000 {
>   			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_LOW>;
>   			clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
>   			clock-names = "baud", "bus";
> +			reg-io-width = <4>;
> +			reg-shift = <2>;
>   			status = "disabled";
>   		};
>   
> @@ -643,6 +649,8 @@ uart3: serial@11005000 {
>   			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_LOW>;
>   			clocks = <&pericfg CLK_PERI_UART3_SEL>, <&pericfg CLK_PERI_UART3>;
>   			clock-names = "baud", "bus";
> +			reg-io-width = <4>;
> +			reg-shift = <2>;
>   			status = "disabled";
>   		};
>   
> 

  parent reply	other threads:[~2020-09-10 10:25 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-10  8:43 [PATCH v2 1/2] arm64: dts: mt8173: Set uart to mmio32 iotype Hsin-Yi Wang
2020-09-10  8:43 ` [PATCH v2 2/2] arm64: dts: mt8183: " Hsin-Yi Wang
2020-09-10 10:25 ` Matthias Brugger [this message]
2020-09-10 13:40   ` [PATCH v2 1/2] arm64: dts: mt8173: " Hsin-Yi Wang
2020-09-11  9:43     ` Hsin-Yi Wang

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