From: Lucas Stach <l.stach@pengutronix.de>
To: Bjorn Helgaas <helgaas@kernel.org>,
Christian Bruel <christian.bruel@foss.st.com>,
Rob Herring <robh+dt@kernel.org>
Cc: lpieralisi@kernel.org, kw@linux.com,
manivannan.sadhasivam@linaro.org, robh@kernel.org,
bhelgaas@google.com, krzk+dt@kernel.org, conor+dt@kernel.org,
mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com,
p.zabel@pengutronix.de, cassel@kernel.org,
quic_schintav@quicinc.com, fabrice.gasnier@foss.st.com,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/5] PCI: stm32: Add PCIe host support for STM32MP25
Date: Fri, 29 Nov 2024 22:18:40 +0100 [thread overview]
Message-ID: <9ca967aea19d6c28327f3a9bb77e23f6245603e9.camel@pengutronix.de> (raw)
In-Reply-To: <20241129205822.GA2772018@bhelgaas>
Am Freitag, dem 29.11.2024 um 14:58 -0600 schrieb Bjorn Helgaas:
> [+to Rob, DMA mask question]
>
> On Tue, Nov 26, 2024 at 04:51:16PM +0100, Christian Bruel wrote:
> > Add driver for the STM32MP25 SoC PCIe Gen2 controller based on the
> > DesignWare PCIe core.
>
> Can you include the numeric rate, not just "gen2", so we don't have to
> search for it?
>
> > +static int stm32_pcie_resume_noirq(struct device *dev)
> > +{
> > + struct stm32_pcie *stm32_pcie = dev_get_drvdata(dev);
> > + struct dw_pcie *pci = stm32_pcie->pci;
> > + struct dw_pcie_rp *pp = &pci->pp;
> > + int ret;
> > +
> > + /* init_state must be called first to force clk_req# gpio when no
> > + * device is plugged.
> > + */
>
> Use drivers/pci/ conventional comment style:
>
> /*
> * text ...
> */
>
> > +static bool is_stm32_pcie_driver(struct device *dev)
> > +{
> > + /* PCI bridge */
> > + dev = get_device(dev);
> > +
> > + /* Platform driver */
> > + dev = get_device(dev->parent);
> > +
> > + return (dev->driver == &stm32_pcie_driver.driver);
> > +}
> > +
> > +/*
> > + * DMA masters can only access the first 4GB of memory space,
> > + * so we setup the bus DMA limit accordingly.
> > + */
> > +static int stm32_dma_limit(struct pci_dev *pdev, void *data)
> > +{
> > + dev_dbg(&pdev->dev, "disabling DMA DAC for device");
> > +
> > + pdev->dev.bus_dma_limit = DMA_BIT_MASK(32);
>
> I don't think this is the right way to do this. Surely there's a way
> to describe the DMA capability of the bridge once instead of iterating
> over all the downstream devices? This quirk can't work for hot-added
> devices anyway.
>
This should simply be a dma-ranges property in the PCIe host controller
DT node, which should describe the DMA address range limits for
transactions passing through the host.
Regards,
Lucas
> > + return 0;
> > +}
> > +
> > +static void quirk_stm32_dma_mask(struct pci_dev *pci)
> > +{
> > + struct pci_dev *root_port;
> > +
> > + root_port = pcie_find_root_port(pci);
> > +
> > + if (root_port && is_stm32_pcie_driver(root_port->dev.parent))
> > + pci_walk_bus(pci->bus, stm32_dma_limit, NULL);
> > +}
> > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SYNOPSYS, 0x0550, quirk_stm32_dma_mask);
>
next prev parent reply other threads:[~2024-11-29 21:19 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-26 15:51 [PATCH v2 0/5] Add STM32MP25 PCIe drivers Christian Bruel
2024-11-26 15:51 ` [PATCH v2 1/5] dt-bindings: PCI: Add STM32MP25 PCIe root complex bindings Christian Bruel
2024-11-27 14:50 ` Rob Herring
2024-12-03 13:34 ` Manivannan Sadhasivam
2024-12-03 16:55 ` Christian Bruel
2024-12-03 22:25 ` Bjorn Helgaas
2024-12-05 13:41 ` Christian Bruel
2024-12-05 17:20 ` Bjorn Helgaas
2024-12-17 15:53 ` Christian Bruel
2024-12-17 17:25 ` Manivannan Sadhasivam
2024-12-18 8:42 ` Christian Bruel
2024-12-18 9:06 ` Manivannan Sadhasivam
2024-12-17 17:20 ` Manivannan Sadhasivam
2024-12-05 17:23 ` Bjorn Helgaas
2024-11-26 15:51 ` [PATCH v2 2/5] PCI: stm32: Add PCIe host support for STM32MP25 Christian Bruel
2024-11-29 20:58 ` Bjorn Helgaas
2024-11-29 21:18 ` Lucas Stach [this message]
2024-12-05 11:46 ` Christian Bruel
2024-12-03 14:52 ` Manivannan Sadhasivam
2024-12-16 9:00 ` Christian Bruel
2024-12-18 9:46 ` Manivannan Sadhasivam
2024-12-18 11:24 ` Christian Bruel
2024-12-18 11:46 ` Manivannan Sadhasivam
2024-12-09 4:34 ` kernel test robot
2024-11-26 15:51 ` [PATCH v2 3/5] dt-bindings: PCI: Add STM32MP25 PCIe endpoint bindings Christian Bruel
2024-11-27 14:51 ` Rob Herring
2024-11-27 14:59 ` Rob Herring (Arm)
2024-12-03 14:54 ` Manivannan Sadhasivam
2024-11-26 15:51 ` [PATCH v2 4/5] PCI: stm32: Add PCIe endpoint support for STM32MP25 Christian Bruel
2024-12-03 15:22 ` Manivannan Sadhasivam
2024-12-16 10:02 ` Christian Bruel
2024-12-16 16:17 ` Manivannan Sadhasivam
2024-12-17 9:48 ` Christian Bruel
2024-12-18 9:08 ` Manivannan Sadhasivam
2024-12-18 9:21 ` Christian Bruel
2025-01-10 15:33 ` Christian Bruel
2025-01-10 14:49 ` Christian Bruel
2024-12-05 17:27 ` Bjorn Helgaas
2024-12-16 14:00 ` Christian Bruel
2025-01-14 17:05 ` Bjorn Helgaas
2025-01-14 12:10 ` Christian Bruel
2024-11-26 15:51 ` [PATCH v2 5/5] MAINTAINERS: add entry for ST STM32MP25 PCIe drivers Christian Bruel
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