From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A9721276028; Wed, 27 Aug 2025 09:25:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756286748; cv=none; b=H5JlFsBGj6iOMFXzdSDaZtNhJWQzmqZZCP3n27knvb4TxeOOA9AsWtjM8Wu5WVkum5kgbZ+zaFQ8B4YLtva4gA839Aa6bwHWNbiYxQ8bO+YUuljw1jZmEIdqlO14SjUnjxvRiLv0lYw2+oJQpwQve2zYaivHm/NR6JKZXH7AePo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756286748; c=relaxed/simple; bh=8oMxZWDAZwfTEOQY6QBYQEwidsHjCnQsdJBAf2fyNGo=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=HeG5JAA8yvDQEd+acV15BlrSzcGJdjel1OpC/Q3Q/H4HS6kmmV1WjR2SOBuhgRCsZ0zpQiCwjhFppr0fSXGyW5DouKGYiD26hcCmRQbM99Wl61XybqxMO1B3+A6YT7ngaL0ihz0yVRNJlMe7+DSwGdewhRtE1UqlqYjxhRoR1Gs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B470015A1; Wed, 27 Aug 2025 02:25:37 -0700 (PDT) Received: from [10.1.196.46] (e134344.arm.com [10.1.196.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DC66C3F738; Wed, 27 Aug 2025 02:25:40 -0700 (PDT) Message-ID: <9ce36190-6d99-4a41-a803-a65be677db2d@arm.com> Date: Wed, 27 Aug 2025 10:25:39 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 05/33] ACPI / PPTT: Find cache level by cache-id To: James Morse , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, devicetree@vger.kernel.org Cc: shameerali.kolothum.thodi@huawei.com, D Scott Phillips OS , carl@os.amperecomputing.com, lcherian@marvell.com, bobo.shaobowang@huawei.com, tan.shaopeng@fujitsu.com, baolin.wang@linux.alibaba.com, Jamie Iles , Xin Hao , peternewman@google.com, dfustini@baylibre.com, amitsinght@marvell.com, David Hildenbrand , Rex Nie , Dave Martin , Koba Ko , Shanker Donthineni , fenghuay@nvidia.com, baisheng.gao@unisoc.com, Jonathan Cameron , Rob Herring , Rohit Mathew , Rafael Wysocki , Len Brown , Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon , Greg Kroah-Hartman , Danilo Krummrich References: <20250822153048.2287-1-james.morse@arm.com> <20250822153048.2287-6-james.morse@arm.com> From: Ben Horgan Content-Language: en-US In-Reply-To: <20250822153048.2287-6-james.morse@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi James, On 8/22/25 16:29, James Morse wrote: > The MPAM table identifies caches by id. The MPAM driver also wants to know > the cache level to determine if the platform is of the shape that can be > managed via resctrl. Cacheinfo has this information, but only for CPUs that > are online. > > Waiting for all CPUs to come online is a problem for platforms where > CPUs are brought online late by user-space. > > Add a helper that walks every possible cache, until it finds the one > identified by cache-id, then return the level. > Add a cleanup based free-ing mechanism for acpi_get_table(). > > CC: Jonathan Cameron > Signed-off-by: James Morse > --- > Changes since RFC: > * acpi_count_levels() now returns a value. > * Converted the table-get stuff to use Jonathan's cleanup helper. > * Dropped Sudeep's Review tag due to the cleanup change. > --- > drivers/acpi/pptt.c | 64 ++++++++++++++++++++++++++++++++++++++++++++ > include/linux/acpi.h | 17 ++++++++++++ > 2 files changed, 81 insertions(+) > > diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c > index 8f9b9508acba..660457644a5b 100644 > --- a/drivers/acpi/pptt.c > +++ b/drivers/acpi/pptt.c > @@ -907,3 +907,67 @@ int find_acpi_cpu_topology_hetero_id(unsigned int cpu) > return find_acpi_cpu_topology_tag(cpu, PPTT_ABORT_PACKAGE, > ACPI_PPTT_ACPI_IDENTICAL); > } > + > +/** > + * find_acpi_cache_level_from_id() - Get the level of the specified cache > + * @cache_id: The id field of the unified cache > + * > + * Determine the level relative to any CPU for the unified cache identified by > + * cache_id. This allows the property to be found even if the CPUs are offline. > + * > + * The returned level can be used to group unified caches that are peers. > + * > + * The PPTT table must be rev 3 or later, > + * > + * If one CPUs L2 is shared with another as L3, this function will return > + * an unpredictable value. > + * > + * Return: -ENOENT if the PPTT doesn't exist, or the cache cannot be found. > + * Otherwise returns a value which represents the level of the specified cache. > + */ > +int find_acpi_cache_level_from_id(u32 cache_id) > +{ > + u32 acpi_cpu_id; > + int level, cpu, num_levels; > + struct acpi_pptt_cache *cache; > + struct acpi_pptt_cache_v1 *cache_v1; > + struct acpi_pptt_processor *cpu_node; > + struct acpi_table_header *table __free(acpi_table) = acpi_get_table_ret(ACPI_SIG_PPTT, 0); > + > + if (IS_ERR(table)) > + return PTR_ERR(table); > + > + if (table->revision < 3) > + return -ENOENT; > + > + /* > + * If we found the cache first, we'd still need to walk from each CPU > + * to find the level... > + */ > + for_each_possible_cpu(cpu) { > + acpi_cpu_id = get_acpi_id_for_cpu(cpu); > + cpu_node = acpi_find_processor_node(table, acpi_cpu_id); > + if (!cpu_node) > + return -ENOENT; > + num_levels = acpi_count_levels(table, cpu_node, NULL); > + > + /* Start at 1 for L1 */ > + for (level = 1; level <= num_levels; level++) { > + cache = acpi_find_cache_node(table, acpi_cpu_id, > + ACPI_PPTT_CACHE_TYPE_UNIFIED, > + level, &cpu_node); > + if (!cache) > + continue; > + > + cache_v1 = ACPI_ADD_PTR(struct acpi_pptt_cache_v1, > + cache, > + sizeof(struct acpi_pptt_cache)); > + > + if (cache->flags & ACPI_PPTT_CACHE_ID_VALID && > + cache_v1->cache_id == cache_id) > + return level; > + } > + } > + > + return -ENOENT; > +} > diff --git a/include/linux/acpi.h b/include/linux/acpi.h > index f97a9ff678cc..30c10b1dcdb2 100644 > --- a/include/linux/acpi.h > +++ b/include/linux/acpi.h > @@ -8,6 +8,7 @@ > #ifndef _LINUX_ACPI_H > #define _LINUX_ACPI_H > > +#include > #include > #include /* for struct resource */ > #include > @@ -221,6 +222,17 @@ void acpi_reserve_initial_tables (void); > void acpi_table_init_complete (void); > int acpi_table_init (void); > > +static inline struct acpi_table_header *acpi_get_table_ret(char *signature, u32 instance) > +{ > + struct acpi_table_header *table; > + int status = acpi_get_table(signature, instance, &table); > + > + if (ACPI_FAILURE(status)) > + return ERR_PTR(-ENOENT); > + return table; > +} > +DEFINE_FREE(acpi_table, struct acpi_table_header *, if (!IS_ERR(_T)) acpi_put_table(_T)) nit: Is it useful to change the condition from !IS_ERR(_T) to !IS_ERR_OR_NULL(_T)? This seems to be the common pattern. I do note that acpi_put_table() can take NULL, so there is no real danger. > + > int acpi_table_parse(char *id, acpi_tbl_table_handler handler); > int __init_or_acpilib acpi_table_parse_entries(char *id, > unsigned long table_size, int entry_id, > @@ -1542,6 +1554,7 @@ int find_acpi_cpu_topology_cluster(unsigned int cpu); > int find_acpi_cpu_topology_package(unsigned int cpu); > int find_acpi_cpu_topology_hetero_id(unsigned int cpu); > void acpi_pptt_get_cpus_from_container(u32 acpi_cpu_id, cpumask_t *cpus); > +int find_acpi_cache_level_from_id(u32 cache_id); > #else > static inline int acpi_pptt_cpu_is_thread(unsigned int cpu) > { > @@ -1565,6 +1578,10 @@ static inline int find_acpi_cpu_topology_hetero_id(unsigned int cpu) > } > static inline void acpi_pptt_get_cpus_from_container(u32 acpi_cpu_id, > cpumask_t *cpus) { } > +static inline int find_acpi_cache_level_from_id(u32 cache_id) > +{ > + return -EINVAL; > +} > #endif > > void acpi_arch_init(void); Thanks, Ben