From: Marek Vasut <marex@denx.de>
To: Alexander Stein <alexander.stein@ew.tq-group.com>
Cc: linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Adam Ford <aford173@gmail.com>, Alice Guo <alice.guo@nxp.com>,
Amit Kucheria <amitk@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Fabio Estevam <festevam@gmail.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Li Jun <jun.li@nxp.com>, Lucas Stach <l.stach@pengutronix.de>,
Markus Niebel <Markus.Niebel@ew.tq-group.com>,
NXP Linux Team <linux-imx@nxp.com>, Peng Fan <peng.fan@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Richard Cochran <richardcochran@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Shawn Guo <shawnguo@kernel.org>, Zhang Rui <rui.zhang@intel.com>,
devicetree@vger.kernel.org
Subject: Re: [PATCH 4/5] arm64: dts: imx8m: Add TMU phandle to calibration data in OCOTP
Date: Mon, 28 Nov 2022 10:35:26 +0100 [thread overview]
Message-ID: <9d5c9ced-3ea5-414e-11f0-ab5b843f7482@denx.de> (raw)
In-Reply-To: <12103021.O9o76ZdvQC@steina-w>
On 11/28/22 09:34, Alexander Stein wrote:
> Hi Marek,
Hi,
> Am Samstag, 26. November 2022, 23:47:39 CET schrieb Marek Vasut:
>> The TMU TASR, TCALIVn, TRIM registers must be explicitly programmed with
>> calibration values in OCOTP. Add the OCOTP calibration values phandle so
>> the TMU driver can perform this programming.
>>
>> The MX8MM/MX8MN TMUv1 uses only one OCOTP cell, while MX8MP TMUv2 uses 4.
>
> Is there any source for the fuse addresses? I can only find
> OCOTP_OCOTP_HW_OCOTP_ANA1 and a calibration description in TMU section in the
> IMX8MNRM Rev 2, but I can't find any fuse for imx8mm and imx8mp.
See 5/5 in this series, the offsets are pulled from U-Boot. The
documentation seems to be lacking in this case, I couldn't find anything
there either.
next prev parent reply other threads:[~2022-11-28 9:46 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-26 22:47 [PATCH 1/5] dt-bindings: thermal: imx8mm-thermal: Document optional nvmem-cells Marek Vasut
2022-11-26 22:47 ` [PATCH 2/5] arm64: dts: imx8m: Align SoC unique ID node unit address Marek Vasut
2022-11-28 2:16 ` Peng Fan
2022-11-26 22:47 ` [PATCH 3/5] arm64: dts: imx8m: Document the fuse address calculation Marek Vasut
2022-11-28 2:18 ` Peng Fan
2022-11-26 22:47 ` [PATCH 4/5] arm64: dts: imx8m: Add TMU phandle to calibration data in OCOTP Marek Vasut
2022-11-28 2:29 ` Peng Fan
2022-11-28 8:34 ` Alexander Stein
2022-11-28 9:35 ` Marek Vasut [this message]
2022-11-26 22:47 ` [PATCH 5/5] thermal/drivers/imx: Add support for loading calibration data from OCOTP Marek Vasut
2022-11-27 5:07 ` kernel test robot
2022-11-28 2:58 ` Peng Fan
2022-11-30 15:14 ` kernel test robot
2022-12-01 5:13 ` kernel test robot
2022-11-27 12:33 ` [PATCH 1/5] dt-bindings: thermal: imx8mm-thermal: Document optional nvmem-cells Krzysztof Kozlowski
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