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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: NjkfW09bgB_-_ZAQ2zAmS7IoJVDyBbNe X-Proofpoint-Spam-Info: AW1haW4tMjYxMDE1MDA0MSBTYWx0ZWRfX6L0WS9jQezNG bEHoG32wPqKpfEfvfJ8F4PjigAvQYtr5dYzDxlYYirQlMKTMM0KOlvsBnrCQeaEarCABtTSzLYf 3jxlhKFW/ncywpirMhj1CAB1jo8UGqw= X-Proofpoint-GUID: NjkfW09bgB_-_ZAQ2zAmS7IoJVDyBbNe X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDE1MDA0MSBTYWx0ZWRfXyAygCsFkcS4d bCNO3NW91CR8DpYeiklVQluvefq2HNwgX3ARReX+OTqbDXvQbpbnBD390kbrgWpPWBby+CaLan6 nHgW0Hy5DLELHvWgpNYWi6mOtvmL7JiHLCrykpkAR3VKUD6MEzywK2EjM87uaeN8wOy8mJS0vE2 7ufVyaxBtRwWoD6ALpHBUGKUr70mNk2r4aRYlIujoW48iynawv5PbkELbN7dlzKyRTuSs4Jfhut UOEZQwGzzfiex46JtvKpu9vQuAnNbD2focIQnI6KXFlJAlwN/OjdobQXDlqVqG+OalHWx0MVAAU K1r6oXI7esfKrYekL0Ykw8Hf760UqrHRybph9T1xyFd2R4gyL+EPZLZNObR0FsuhyM2pcBavwZj ZOcmjQOfPmDcMcRqGL3hXftL2Ag5gFDrl8xZXpTtuxYswpy4K19RLb/8d9rQzsm8c2LAkNePMvl 6+dt4lCV9EDCyTgjy8Q== X-Authority-Analysis: v=2.4 cv=SYZi5fRu c=1 sm=1 tr=0 ts=6ad0a90f cx=c_pps a=7E5Bxpl4vBhpaufnMqZlrw==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=Z62H7OANAOBda0uacUIA:9 a=QEXdDO2ut3YA:10 a=pJ04lnu7RYOZP9TFuWaZ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-14_01,2026-10-14_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 bulkscore=0 phishscore=0 suspectscore=0 clxscore=1015 spamscore=0 lowpriorityscore=0 impostorscore=0 adultscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610080000 definitions=main-2610150041 On 10/8/26 10:10 AM, Shawn Guo wrote: > The video clock controller binding describes three clock inputs for > SM8750: the board XO, the always-on board XO and the 32 kHz sleep clock. > The videocc node instead passes the board XO and GCC_VIDEO_AHB_CLK, > which is not an input of the controller. > > Pass bi_tcxo_ao_div2 and the board sleep clock in place of the AHB > clock. No functional change, GCC_VIDEO_AHB_CLK is enabled independently > of this node. > > Assisted-by: LLM > Signed-off-by: Shawn Guo > --- Reviewed-by: Konrad Dybcio Konrad